| Index: sim/testsuite/sim/bfin/se_all32bitopcodes.S
|
| diff --git a/sim/testsuite/sim/bfin/se_all32bitopcodes.S b/sim/testsuite/sim/bfin/se_all32bitopcodes.S
|
| index f8664e6d9b4942448a7afeefbbbd8e8043c8714c..6ffe6d1c5cfc5437c9ad7546984435003955b967 100644
|
| --- a/sim/testsuite/sim/bfin/se_all32bitopcodes.S
|
| +++ b/sim/testsuite/sim/bfin/se_all32bitopcodes.S
|
| @@ -64,6 +64,19 @@
|
| R0 = R0 + R1;
|
| 1:
|
|
|
| +.ifndef BFIN_JTAG
|
| + /* Skip debug insns when running in the sim. */
|
| + R1.L = 0xff00;
|
| + R1.H = 0x0000;
|
| + R2 = R0 & R1;
|
| + R1.L = 0xf000;
|
| + CC = R1 == R2;
|
| + IF !CC jump 1f (bp);
|
| + R0.L = 0xf100;
|
| + R0.H = 0x0000;
|
| +1:
|
| +.endif
|
| +
|
| [P5] = R0;
|
| .endm
|
|
|
| @@ -34164,7 +34177,7 @@
|
| .dw 0x0000, 0xe5c0, 0xffff, 0xe5ff, 0x21, 0
|
| .dw 0x0000, 0xe6c0, 0xffff, 0xe6ff, 0x21, 0
|
| .dw 0x0000, 0xe740, 0xffff, 0xe7ff, 0x21, 0
|
| - .dw 0x0000, 0xf001, 0xffff, 0xffff, 0x21, 0
|
| + .dw 0x0000, 0xf001, 0xffff, 0xffff, 0x21, 0
|
| .dw 0x0000, 0x0000, 0x0000, 0x0000, 0x00, 0
|
| .endm
|
|
|
|
|