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1 # Makefile template for Configure for the frv simulator | 1 # Makefile template for Configure for the frv simulator |
2 # Copyright (C) 1998-2001, 2003, 2007-2012 Free Software Foundation, | 2 # Copyright (C) 1998-2013 Free Software Foundation, Inc. |
3 # Inc. | |
4 # Contributed by Red Hat. | 3 # Contributed by Red Hat. |
5 # | 4 # |
6 # This program is free software; you can redistribute it and/or modify | 5 # This program is free software; you can redistribute it and/or modify |
7 # it under the terms of the GNU General Public License as published by | 6 # it under the terms of the GNU General Public License as published by |
8 # the Free Software Foundation; either version 3 of the License, or | 7 # the Free Software Foundation; either version 3 of the License, or |
9 # (at your option) any later version. | 8 # (at your option) any later version. |
10 # | 9 # |
11 # This program is distributed in the hope that it will be useful, | 10 # This program is distributed in the hope that it will be useful, |
12 # but WITHOUT ANY WARRANTY; without even the implied warranty of | 11 # but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 # GNU General Public License for more details. | 13 # GNU General Public License for more details. |
15 # | 14 # |
16 # You should have received a copy of the GNU General Public License | 15 # You should have received a copy of the GNU General Public License |
17 # along with this program. If not, see <http://www.gnu.org/licenses/>. | 16 # along with this program. If not, see <http://www.gnu.org/licenses/>. |
18 | 17 |
19 ## COMMON_PRE_CONFIG_FRAG | 18 ## COMMON_PRE_CONFIG_FRAG |
20 | 19 |
21 FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o | 20 FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o |
22 | 21 |
23 CONFIG_DEVICES = dv-sockser.o | |
24 CONFIG_DEVICES = | |
25 | |
26 SIM_OBJS = \ | 22 SIM_OBJS = \ |
27 $(SIM_NEW_COMMON_OBJS) \ | 23 $(SIM_NEW_COMMON_OBJS) \ |
28 sim-cpu.o \ | 24 sim-cpu.o \ |
29 sim-hload.o \ | 25 sim-hload.o \ |
30 sim-hrw.o \ | 26 sim-hrw.o \ |
31 sim-model.o \ | 27 sim-model.o \ |
32 sim-reg.o \ | 28 sim-reg.o \ |
33 cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \ | 29 cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \ |
34 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ | 30 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ |
35 sim-if.o arch.o \ | 31 sim-if.o arch.o \ |
36 $(FRV_OBJS) \ | 32 $(FRV_OBJS) \ |
37 traps.o interrupts.o memory.o cache.o pipeline.o \ | 33 traps.o interrupts.o memory.o cache.o pipeline.o \ |
38 profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.
o options.o \ | 34 profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.
o options.o \ |
39 devices.o reset.o registers.o \ | 35 devices.o reset.o registers.o \ |
40 » $(CONFIG_DEVICES) | 36 » $(frv_extra_objs) |
41 | 37 |
42 # Extra headers included by sim-main.h. | 38 # Extra headers included by sim-main.h. |
43 SIM_EXTRA_DEPS = \ | 39 SIM_EXTRA_DEPS = \ |
44 $(CGEN_INCLUDE_DEPS) \ | 40 $(CGEN_INCLUDE_DEPS) \ |
45 arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \ | 41 arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \ |
46 registers.h profile.h \ | 42 registers.h profile.h \ |
47 $(sim-options_h) | 43 $(sim-options_h) |
48 | 44 |
49 SIM_EXTRA_CFLAGS = @sim_trapdump@ | 45 SIM_EXTRA_CFLAGS = @sim_trapdump@ |
50 | 46 |
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122 | 118 |
123 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../c
pu/frv.cpu | 119 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../c
pu/frv.cpu |
124 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ | 120 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ |
125 cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \ | 121 cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \ |
126 archfile=$(srcdir)/../../cpu/frv.cpu \ | 122 archfile=$(srcdir)/../../cpu/frv.cpu \ |
127 FLAGS="with-scache with-profile=fn with-generic-write with-parallel-on
ly" \ | 123 FLAGS="with-scache with-profile=fn with-generic-write with-parallel-on
ly" \ |
128 EXTRAFILES="$(CGEN_CPU_SEM)" | 124 EXTRAFILES="$(CGEN_CPU_SEM)" |
129 touch stamp-cpu | 125 touch stamp-cpu |
130 cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu | 126 cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu |
131 # @true | 127 # @true |
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