sim/bfin/sim-main.h - Issue 124383005: GDB 7.6.50

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Side by Side Diff: sim/bfin/sim-main.h

Issue 124383005: GDB 7.6.50 (Closed) Base URL: http://git.chromium.org/native_client/nacl-gdb.git@upstream

Patch Set: Created 6 years, 11 months ago

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1 /* Simulator for Analog Devices Blackfin processors.	1 /* Simulator for Analog Devices Blackfin processors.

2	2

3 Copyright (C) 2005-2012 Free Software Foundation, Inc.	3 Copyright (C) 2005-2013 Free Software Foundation, Inc.

4 Contributed by Analog Devices, Inc.	4 Contributed by Analog Devices, Inc.

5	5

6 This file is part of simulators.	6 This file is part of simulators.

7	7

8 This program is free software; you can redistribute it and/or modify	8 This program is free software; you can redistribute it and/or modify

9 it under the terms of the GNU General Public License as published by	9 it under the terms of the GNU General Public License as published by

10 the Free Software Foundation; either version 3 of the License, or	10 the Free Software Foundation; either version 3 of the License, or

11 (at your option) any later version.	11 (at your option) any later version.

12	12

13 This program is distributed in the hope that it will be useful,	13 This program is distributed in the hope that it will be useful,

(...skipping 94 matching lines...) Expand 10 before \| Expand all \| Expand 10 after Loading...
108 do { \	108 do { \

109 if (TRACE_CORE_P (cpu)) \	109 if (TRACE_CORE_P (cpu)) \

110 trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \	110 trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \

111 } while (0)	111 } while (0)

112 #define TRACE_REG(cpu, reg, val) TRACE_REGISTER (cpu, "wrote "#reg" = %#x", val)	112 #define TRACE_REG(cpu, reg, val) TRACE_REGISTER (cpu, "wrote "#reg" = %#x", val)

113	113

114 /* Default memory size. */	114 /* Default memory size. */

115 #define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)	115 #define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)

116	116

117 #endif	117 #endif

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