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1 /* run front end support for arm | 1 /* run front end support for arm |
2 Copyright (C) 1995-1997, 2000-2002, 2007-2012 Free Software | 2 Copyright (C) 1995-2013 Free Software Foundation, Inc. |
3 Foundation, Inc. | |
4 | 3 |
5 This file is part of ARM SIM. | 4 This file is part of ARM SIM. |
6 | 5 |
7 This program is free software; you can redistribute it and/or modify | 6 This program is free software; you can redistribute it and/or modify |
8 it under the terms of the GNU General Public License as published by | 7 it under the terms of the GNU General Public License as published by |
9 the Free Software Foundation; either version 3 of the License, or | 8 the Free Software Foundation; either version 3 of the License, or |
10 (at your option) any later version. | 9 (at your option) any later version. |
11 | 10 |
12 This program is distributed in the hope that it will be useful, | 11 This program is distributed in the hope that it will be useful, |
13 but WITHOUT ANY WARRANTY; without even the implied warranty of | 12 but WITHOUT ANY WARRANTY; without even the implied warranty of |
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30 #include "gdb/callback.h" | 29 #include "gdb/callback.h" |
31 #include "gdb/remote-sim.h" | 30 #include "gdb/remote-sim.h" |
32 #include "armdefs.h" | 31 #include "armdefs.h" |
33 #include "armemu.h" | 32 #include "armemu.h" |
34 #include "dbg_rdi.h" | 33 #include "dbg_rdi.h" |
35 #include "ansidecl.h" | 34 #include "ansidecl.h" |
36 #include "sim-utils.h" | 35 #include "sim-utils.h" |
37 #include "run-sim.h" | 36 #include "run-sim.h" |
38 #include "gdb/sim-arm.h" | 37 #include "gdb/sim-arm.h" |
39 #include "gdb/signals.h" | 38 #include "gdb/signals.h" |
| 39 #include "libiberty.h" |
40 | 40 |
41 host_callback *sim_callback; | 41 host_callback *sim_callback; |
42 | 42 |
43 static struct ARMul_State *state; | 43 static struct ARMul_State *state; |
44 | 44 |
45 /* Who is using the simulator. */ | 45 /* Who is using the simulator. */ |
46 static SIM_OPEN_KIND sim_kind; | 46 static SIM_OPEN_KIND sim_kind; |
47 | 47 |
48 /* argv[0] */ | 48 /* argv[0] */ |
49 static char *myname; | 49 static char *myname; |
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236 sim_create_inferior (sd, abfd, argv, env) | 236 sim_create_inferior (sd, abfd, argv, env) |
237 SIM_DESC sd ATTRIBUTE_UNUSED; | 237 SIM_DESC sd ATTRIBUTE_UNUSED; |
238 struct bfd * abfd; | 238 struct bfd * abfd; |
239 char ** argv; | 239 char ** argv; |
240 char ** env; | 240 char ** env; |
241 { | 241 { |
242 int argvlen = 0; | 242 int argvlen = 0; |
243 int mach; | 243 int mach; |
244 char **arg; | 244 char **arg; |
245 | 245 |
| 246 init (); |
| 247 |
246 if (abfd != NULL) | 248 if (abfd != NULL) |
247 ARMul_SetPC (state, bfd_get_start_address (abfd)); | 249 { |
| 250 ARMul_SetPC (state, bfd_get_start_address (abfd)); |
| 251 mach = bfd_get_mach (abfd); |
| 252 } |
248 else | 253 else |
249 ARMul_SetPC (state, 0);» /* ??? */ | 254 { |
250 | 255 ARMul_SetPC (state, 0);» /* ??? */ |
251 mach = bfd_get_mach (abfd); | 256 mach = 0; |
| 257 } |
252 | 258 |
253 switch (mach) | 259 switch (mach) |
254 { | 260 { |
255 default: | 261 default: |
256 (*sim_callback->printf_filtered) | 262 (*sim_callback->printf_filtered) |
257 (sim_callback, | 263 (sim_callback, |
258 "Unknown machine type '%d'; please update sim_create_inferior.\n", | 264 "Unknown machine type '%d'; please update sim_create_inferior.\n", |
259 mach); | 265 mach); |
260 /* fall through */ | 266 /* fall through */ |
261 | 267 |
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436 memory[1] = val >> 8; | 442 memory[1] = val >> 8; |
437 memory[0] = val >> 0; | 443 memory[0] = val >> 0; |
438 } | 444 } |
439 } | 445 } |
440 | 446 |
441 int | 447 int |
442 sim_store_register (sd, rn, memory, length) | 448 sim_store_register (sd, rn, memory, length) |
443 SIM_DESC sd ATTRIBUTE_UNUSED; | 449 SIM_DESC sd ATTRIBUTE_UNUSED; |
444 int rn; | 450 int rn; |
445 unsigned char *memory; | 451 unsigned char *memory; |
446 int length ATTRIBUTE_UNUSED; | 452 int length; |
447 { | 453 { |
448 init (); | 454 init (); |
449 | 455 |
450 switch ((enum sim_arm_regs) rn) | 456 switch ((enum sim_arm_regs) rn) |
451 { | 457 { |
452 case SIM_ARM_R0_REGNUM: | 458 case SIM_ARM_R0_REGNUM: |
453 case SIM_ARM_R1_REGNUM: | 459 case SIM_ARM_R1_REGNUM: |
454 case SIM_ARM_R2_REGNUM: | 460 case SIM_ARM_R2_REGNUM: |
455 case SIM_ARM_R3_REGNUM: | 461 case SIM_ARM_R3_REGNUM: |
456 case SIM_ARM_R4_REGNUM: | 462 case SIM_ARM_R4_REGNUM: |
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537 case SIM_ARM_IWMMXT_COP1R12_REGNUM: | 543 case SIM_ARM_IWMMXT_COP1R12_REGNUM: |
538 case SIM_ARM_IWMMXT_COP1R13_REGNUM: | 544 case SIM_ARM_IWMMXT_COP1R13_REGNUM: |
539 case SIM_ARM_IWMMXT_COP1R14_REGNUM: | 545 case SIM_ARM_IWMMXT_COP1R14_REGNUM: |
540 case SIM_ARM_IWMMXT_COP1R15_REGNUM: | 546 case SIM_ARM_IWMMXT_COP1R15_REGNUM: |
541 return Store_Iwmmxt_Register (rn - SIM_ARM_IWMMXT_COP0R0_REGNUM, memory); | 547 return Store_Iwmmxt_Register (rn - SIM_ARM_IWMMXT_COP0R0_REGNUM, memory); |
542 | 548 |
543 default: | 549 default: |
544 return 0; | 550 return 0; |
545 } | 551 } |
546 | 552 |
547 return -1; | 553 return length; |
548 } | 554 } |
549 | 555 |
550 int | 556 int |
551 sim_fetch_register (sd, rn, memory, length) | 557 sim_fetch_register (sd, rn, memory, length) |
552 SIM_DESC sd ATTRIBUTE_UNUSED; | 558 SIM_DESC sd ATTRIBUTE_UNUSED; |
553 int rn; | 559 int rn; |
554 unsigned char *memory; | 560 unsigned char *memory; |
555 int length ATTRIBUTE_UNUSED; | 561 int length; |
556 { | 562 { |
557 ARMword regval; | 563 ARMword regval; |
| 564 int len = length; |
558 | 565 |
559 init (); | 566 init (); |
560 | 567 |
561 switch ((enum sim_arm_regs) rn) | 568 switch ((enum sim_arm_regs) rn) |
562 { | 569 { |
563 case SIM_ARM_R0_REGNUM: | 570 case SIM_ARM_R0_REGNUM: |
564 case SIM_ARM_R1_REGNUM: | 571 case SIM_ARM_R1_REGNUM: |
565 case SIM_ARM_R2_REGNUM: | 572 case SIM_ARM_R2_REGNUM: |
566 case SIM_ARM_R3_REGNUM: | 573 case SIM_ARM_R3_REGNUM: |
567 case SIM_ARM_R4_REGNUM: | 574 case SIM_ARM_R4_REGNUM: |
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650 case SIM_ARM_IWMMXT_COP1R12_REGNUM: | 657 case SIM_ARM_IWMMXT_COP1R12_REGNUM: |
651 case SIM_ARM_IWMMXT_COP1R13_REGNUM: | 658 case SIM_ARM_IWMMXT_COP1R13_REGNUM: |
652 case SIM_ARM_IWMMXT_COP1R14_REGNUM: | 659 case SIM_ARM_IWMMXT_COP1R14_REGNUM: |
653 case SIM_ARM_IWMMXT_COP1R15_REGNUM: | 660 case SIM_ARM_IWMMXT_COP1R15_REGNUM: |
654 return Fetch_Iwmmxt_Register (rn - SIM_ARM_IWMMXT_COP0R0_REGNUM, memory); | 661 return Fetch_Iwmmxt_Register (rn - SIM_ARM_IWMMXT_COP0R0_REGNUM, memory); |
655 | 662 |
656 default: | 663 default: |
657 return 0; | 664 return 0; |
658 } | 665 } |
659 | 666 |
660 while (length) | 667 while (len) |
661 { | 668 { |
662 tomem (state, memory, regval); | 669 tomem (state, memory, regval); |
663 | 670 |
664 length -= 4; | 671 len -= 4; |
665 memory += 4; | 672 memory += 4; |
666 regval = 0; | 673 regval = 0; |
667 } | 674 } |
668 | 675 |
669 return -1; | 676 return length; |
670 } | 677 } |
671 | 678 |
672 #ifdef SIM_TARGET_SWITCHES | 679 #ifdef SIM_TARGET_SWITCHES |
673 | 680 |
674 static void sim_target_parse_arg_array PARAMS ((char **)); | 681 static void sim_target_parse_arg_array PARAMS ((char **)); |
675 | 682 |
676 typedef struct | 683 typedef struct |
677 { | 684 { |
678 char * swi_option; | 685 char * swi_option; |
679 unsigned int swi_mask; | 686 unsigned int swi_mask; |
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937 } | 944 } |
938 | 945 |
939 void | 946 void |
940 sim_set_callbacks (ptr) | 947 sim_set_callbacks (ptr) |
941 host_callback *ptr; | 948 host_callback *ptr; |
942 { | 949 { |
943 sim_callback = ptr; | 950 sim_callback = ptr; |
944 } | 951 } |
945 | 952 |
946 char ** | 953 char ** |
947 sim_complete_command (SIM_DESC sd, char *text, char *word) | 954 sim_complete_command (SIM_DESC sd, const char *text, const char *word) |
948 { | 955 { |
949 return NULL; | 956 return NULL; |
950 } | 957 } |
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