Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(119)

Issues Search
    My Issues | Starred     Open | Closed | All

Side by Side Diff: opcodes/ia64-ic.tbl

Issue 124383005: GDB 7.6.50 (Closed) Base URL: http://git.chromium.org/native_client/nacl-gdb.git@upstream
Patch Set: Created 6 years, 11 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « opcodes/ia64-gen.c ('k') | opcodes/ia64-opc.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 Class; Events/Instructions 1 Class; Events/Instructions
2 all; IC:predicatable-instructions, IC:unpredicatable-instructions 2 all; IC:predicatable-instructions, IC:unpredicatable-instructions
3 branches; IC:indirect-brs, IC:ip-rel-brs 3 branches; IC:indirect-brs, IC:ip-rel-brs
4 cfm-readers; IC:fr-readers, IC:fr-writers, IC:gr-readers, IC:gr-writers, IC:m od-sched-brs, IC:predicatable-instructions, IC:pr-writers, alloc, br.call, brl.c all, br.ret, cover, loadrs, rfi, IC:chk-a, invala.e 4 cfm-readers; IC:fr-readers, IC:fr-writers, IC:gr-readers, IC:gr-writers, IC:m od-sched-brs, IC:predicatable-instructions, IC:pr-writers, alloc, br.call, brl.c all, br.ret, cover, loadrs, rfi, IC:chk-a, invala.e
5 chk-a; chk.a.clr, chk.a.nc 5 chk-a; chk.a.clr, chk.a.nc
6 cmpxchg; cmpxchg1, cmpxchg2, cmpxchg4, cmpxchg8, cmp8xchg16 6 cmpxchg; cmpxchg1, cmpxchg2, cmpxchg4, cmpxchg8, cmp8xchg16
7 czx; czx1, czx2 7 czx; czx1, czx2
8 fcmp-s0; fcmp[Field(sf)==s0] 8 fcmp-s0; fcmp[Field(sf)==s0]
9 fcmp-s1; fcmp[Field(sf)==s1] 9 fcmp-s1; fcmp[Field(sf)==s1]
10 fcmp-s2; fcmp[Field(sf)==s2] 10 fcmp-s2; fcmp[Field(sf)==s2]
(...skipping 171 matching lines...) Expand 10 before | Expand all | Expand 10 after
182 mov-to-CR-ITIR; IC:mov-to-CR[Field(cr3) == ITIR] 182 mov-to-CR-ITIR; IC:mov-to-CR[Field(cr3) == ITIR]
183 mov-to-CR-ITM; IC:mov-to-CR[Field(cr3) == ITM] 183 mov-to-CR-ITM; IC:mov-to-CR[Field(cr3) == ITM]
184 mov-to-CR-ITV; IC:mov-to-CR[Field(cr3) == ITV] 184 mov-to-CR-ITV; IC:mov-to-CR[Field(cr3) == ITV]
185 mov-to-CR-IVA; IC:mov-to-CR[Field(cr3) == IVA] 185 mov-to-CR-IVA; IC:mov-to-CR[Field(cr3) == IVA]
186 mov-to-CR-IVR; IC:mov-to-CR[Field(cr3) == IVR] 186 mov-to-CR-IVR; IC:mov-to-CR[Field(cr3) == IVR]
187 mov-to-CR-LID; IC:mov-to-CR[Field(cr3) == LID] 187 mov-to-CR-LID; IC:mov-to-CR[Field(cr3) == LID]
188 mov-to-CR-LRR; IC:mov-to-CR[Field(cr3) in {LRR0 LRR1}] 188 mov-to-CR-LRR; IC:mov-to-CR[Field(cr3) in {LRR0 LRR1}]
189 mov-to-CR-PMV; IC:mov-to-CR[Field(cr3) == PMV] 189 mov-to-CR-PMV; IC:mov-to-CR[Field(cr3) == PMV]
190 mov-to-CR-PTA; IC:mov-to-CR[Field(cr3) == PTA] 190 mov-to-CR-PTA; IC:mov-to-CR[Field(cr3) == PTA]
191 mov-to-CR-TPR; IC:mov-to-CR[Field(cr3) == TPR] 191 mov-to-CR-TPR; IC:mov-to-CR[Field(cr3) == TPR]
192 mov-to-DAHR; mov_dahr[Format in {M50}]
192 mov-to-IND; mov_indirect[Format in {M42}] 193 mov-to-IND; mov_indirect[Format in {M42}]
193 mov-to-IND-CPUID; IC:mov-to-IND[Field(ireg) == cpuid] 194 mov-to-IND-CPUID; IC:mov-to-IND[Field(ireg) == cpuid]
194 mov-to-IND-DBR; IC:mov-to-IND[Field(ireg) == dbr] 195 mov-to-IND-DBR; IC:mov-to-IND[Field(ireg) == dbr]
195 mov-to-IND-IBR; IC:mov-to-IND[Field(ireg) == ibr] 196 mov-to-IND-IBR; IC:mov-to-IND[Field(ireg) == ibr]
196 mov-to-IND-MSR; IC:mov-to-IND[Field(ireg) == msr] 197 mov-to-IND-MSR; IC:mov-to-IND[Field(ireg) == msr]
197 mov-to-IND-PKR; IC:mov-to-IND[Field(ireg) == pkr] 198 mov-to-IND-PKR; IC:mov-to-IND[Field(ireg) == pkr]
198 mov-to-IND-PMC; IC:mov-to-IND[Field(ireg) == pmc] 199 mov-to-IND-PMC; IC:mov-to-IND[Field(ireg) == pmc]
199 mov-to-IND-PMD; IC:mov-to-IND[Field(ireg) == pmd] 200 mov-to-IND-PMD; IC:mov-to-IND[Field(ireg) == pmd]
200 mov-to-IND-priv; IC:mov-to-IND 201 mov-to-IND-priv; IC:mov-to-IND
201 mov-to-IND-RR; IC:mov-to-IND[Field(ireg) == rr] 202 mov-to-IND-RR; IC:mov-to-IND[Field(ireg) == rr]
(...skipping 46 matching lines...) Expand 10 before | Expand all | Expand 10 after
248 st; st1, st2, st4, st8, st8.spill, st16 249 st; st1, st2, st4, st8, st8.spill, st16
249 st-postinc; IC:stf[Format in {M10}], IC:st[Format in {M5}] 250 st-postinc; IC:stf[Format in {M10}], IC:st[Format in {M5}]
250 stf; stfs, stfd, stfe, stf8, stf.spill 251 stf; stfs, stfd, stfe, stf8, stf.spill
251 sxt; sxt1, sxt2, sxt4 252 sxt; sxt1, sxt2, sxt4
252 sys-mask-writers-partial; rsm, ssm 253 sys-mask-writers-partial; rsm, ssm
253 unpack; unpack1, unpack2, unpack4 254 unpack; unpack1, unpack2, unpack4
254 unpredicatable-instructions; alloc, br.cloop, br.ctop, br.cexit, br.ia, brp, bsw, clrrrb, cover, epc, flushrs, loadrs, rfi, vmsw 255 unpredicatable-instructions; alloc, br.cloop, br.ctop, br.cexit, br.ia, brp, bsw, clrrrb, cover, epc, flushrs, loadrs, rfi, vmsw
255 user-mask-writers-partial; rum, sum 256 user-mask-writers-partial; rum, sum
256 xchg; xchg1, xchg2, xchg4, xchg8 257 xchg; xchg1, xchg2, xchg4, xchg8
257 zxt; zxt1, zxt2, zxt4 258 zxt; zxt1, zxt2, zxt4
OLDNEW
« no previous file with comments | « opcodes/ia64-gen.c ('k') | opcodes/ia64-opc.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698