GDB 7.6.50

gdb/tilegx-tdep.c

 /* Target-dependent code for the Tilera TILE-Gx processor.
 
-   Copyright (C) 2012 Free Software Foundation, Inc.
+   Copyright (C) 2012-2013 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 #include "defs.h"
 #include "frame.h"
 #include "frame-base.h"
 #include "frame-unwind.h"
 #include "dwarf2-frame.h"
 #include "trad-frame.h"
 #include "symtab.h"
 #include "gdbtypes.h"
 #include "gdbcmd.h"
 #include "gdbcore.h"
 #include "value.h"
 #include "dis-asm.h"
 #include "inferior.h"
-#include "gdb_string.h"
+#include <string.h>
 #include "gdb_assert.h"
 #include "arch-utils.h"
 #include "floatformat.h"
 #include "regcache.h"
 #include "regset.h"
 #include "doublest.h"
 #include "osabi.h"
 #include "linux-tdep.h"
 #include "objfiles.h"
 #include "solib-svr4.h"
@@ skipping 104 matching lines @@
   static const char *const register_names[TILEGX_NUM_REGS] =
     {
       "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
       "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
       "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
       "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
       "r32",  "r33",  "r34",  "r35",  "r36",  "r37",  "r38",  "r39",
       "r40",  "r41",  "r42",  "r43",  "r44",  "r45",  "r46",  "r47",
       "r48",  "r49",  "r50",  "r51",  "r52",  "tp",   "sp",   "lr",
       "sn",   "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero",
-      "pc"
+      "pc",   "faultnum",
     };
 
   if (regnum < 0 || regnum >= TILEGX_NUM_REGS)
     internal_error (__FILE__, __LINE__,
                     "tilegx_register_name: invalid register number %d",
                     regnum);
 
   return register_names[regnum];
 }
 
@@ skipping 116 matching lines @@
                         CORE_ADDR bp_addr, int nargs,
                         struct value **args,
                         CORE_ADDR sp, int struct_return,
                         CORE_ADDR struct_addr)
 {
   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
   CORE_ADDR stack_dest = sp;
   int argreg = TILEGX_R0_REGNUM;
   int i, j;
   int typelen, slacklen, alignlen;
-  static const gdb_byte two_zero_words[8] = { 0 };
+  static const gdb_byte four_zero_words[16] = { 0 };
 
   /* If struct_return is 1, then the struct return address will
      consume one argument-passing register.  */
   if (struct_return)
     regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
 
   /* Arguments are passed in R0 - R9, and as soon as an argument
      will not fit completely in the remaining registers, then it,
      and all remaining arguments, are put on the stack.  */
   for (i = 0; i < nargs && argreg <= TILEGX_R9_REGNUM; i++)
@@ skipping 13 matching lines @@
           int n = (typelen - j == 1) ? 1 : tilegx_reg_size;
           ULONGEST w = extract_unsigned_integer (val + j, n, byte_order);
 
           regcache_cooked_write_unsigned (regcache, argreg++, w);
         }
     }
 
   /* Align SP.  */
   stack_dest = tilegx_frame_align (gdbarch, stack_dest);
 
-  /* Loop backwards through arguments to determine stack alignment.  */
-  alignlen = 0;
-
-  for (j = nargs - 1; j >= i; j--)
-    {
-      typelen = TYPE_LENGTH (value_enclosing_type (args[j]));
-      alignlen += (typelen + 3) & (~3);
-    }
-
-  if (alignlen & 0x4)
-    stack_dest -= 4;
-
   /* Loop backwards through remaining arguments and push them on
      the stack, word aligned.  */
   for (j = nargs - 1; j >= i; j--)
     {
       gdb_byte *val;
+      struct cleanup *back_to;
+      const gdb_byte *contents = value_contents (args[j]);
 
       typelen = TYPE_LENGTH (value_enclosing_type (args[j]));
-      slacklen = ((typelen + 3) & (~3)) - typelen;
-      val = alloca (typelen + slacklen);
-      memcpy (val, value_contents (args[j]), typelen);
+      slacklen = align_up (typelen, 8) - typelen;
+      val = xmalloc (typelen + slacklen);
+      back_to = make_cleanup (xfree, val);
+      memcpy (val, contents, typelen);
       memset (val + typelen, 0, slacklen);
 
       /* Now write data to the stack.  The stack grows downwards.  */
       stack_dest -= typelen + slacklen;
       write_memory (stack_dest, val, typelen + slacklen);
+      do_cleanups (back_to);
     }
 
-  /* Add 2 words for linkage space to the stack.  */
-  stack_dest = stack_dest - 8;
-  write_memory (stack_dest, two_zero_words, 8);
+  /* Add 16 bytes for linkage space to the stack.  */
+  stack_dest = stack_dest - 16;
+  write_memory (stack_dest, four_zero_words, 16);
 
   /* Update stack pointer.  */
   regcache_cooked_write_unsigned (regcache, TILEGX_SP_REGNUM, stack_dest);
 
   /* Set the return address register to point to the entry point of
      the program, where a breakpoint lies in wait.  */
   regcache_cooked_write_unsigned (regcache, TILEGX_LR_REGNUM, bp_addr);
 
   return stack_dest;
 }
@@ skipping 23 matching lines @@
   unsigned int instbuf_size;
   int status;
   bfd_uint64_t bundle;
   struct tilegx_decoded_instruction
     decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
   int num_insns;
   struct tilegx_reverse_regs reverse_frame[TILEGX_NUM_PHYS_REGS];
   struct tilegx_reverse_regs
     new_reverse_frame[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
   int dest_regs[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
-  int reverse_frame_valid, prolog_done, branch_seen;
+  int reverse_frame_valid, prolog_done, branch_seen, lr_saved_on_stack_p;
   LONGEST prev_sp_value;
   int i, j;
 
   if (start_addr >= end_addr
       || (start_addr % TILEGX_BUNDLE_ALIGNMENT_IN_BYTES) != 0)
     return end_addr;
 
   /* Initialize the reverse frame.  This maps the CURRENT frame's
      registers to the outer frame's registers (the frame on the
      stack goes the other way).  */
   memcpy (&reverse_frame, &template_reverse_regs, sizeof (reverse_frame));
 
   prolog_done = 0;
   branch_seen = 0;
   prev_sp_value = 0;
+  lr_saved_on_stack_p = 0;
 
   /* To cut down on round-trip overhead, we fetch multiple bundles
      at once.  These variables describe the range of memory we have
      prefetched.  */
   instbuf_start = 0;
   instbuf_size = 0;
 
   for (next_addr = start_addr;
        next_addr < end_addr;
        next_addr += TILEGX_BUNDLE_SIZE_IN_BYTES)
     {
       /* Retrieve the next instruction.  */
       if (next_addr - instbuf_start >= instbuf_size)
         {
           /* Figure out how many bytes to fetch.  Don't span a page
              boundary since that might cause an unnecessary memory
              error.  */
           unsigned int size_on_same_page = 4096 - (next_addr & 4095);
 
           instbuf_size = sizeof instbuf;
 
           if (instbuf_size > size_on_same_page)
             instbuf_size = size_on_same_page;
+
+          instbuf_size = min (instbuf_size, (end_addr - next_addr));
           instbuf_start = next_addr;
 
           status = safe_frame_unwind_memory (next_frame, instbuf_start,
                                              instbuf, instbuf_size);
           if (status == 0)
             memory_error (status, next_addr);
         }
 
       reverse_frame_valid = 0;
 
@@ skipping 20 matching lines @@
                   unsigned saved_register
                     = (unsigned) reverse_frame[operands[1]].value;
 
                   /* realreg >= 0 and addr != -1 indicates that the
                      value of saved_register is in memory location
                      saved_address.  The value of realreg is not
                      meaningful in this case but it must be >= 0.
                      See trad-frame.h.  */
                   cache->saved_regs[saved_register].realreg = saved_register;
                   cache->saved_regs[saved_register].addr = saved_address;
-                }
+                } 
+              else if (cache
+                       && (operands[0] == TILEGX_SP_REGNUM) 
+                       && (operands[1] == TILEGX_LR_REGNUM))
+                lr_saved_on_stack_p = 1;
               break;
             case TILEGX_OPC_ADDI:
             case TILEGX_OPC_ADDLI:
               if (cache
                   && operands[0] == TILEGX_SP_REGNUM
                   && operands[1] == TILEGX_SP_REGNUM
                   && reverse_frame[operands[1]].state == REVERSE_STATE_REGISTER)
                 {
                   /* Special case.  We're fixing up the stack frame.  */
                   uint64_t hopefully_sp
@@ skipping 232 matching lines @@
               && reverse_frame[i].value != i)
             {
               unsigned saved_register = (unsigned) reverse_frame[i].value;
 
               cache->saved_regs[saved_register].realreg = i;
               cache->saved_regs[saved_register].addr = (LONGEST) -1;
             }
         }
     }
 
+  if (lr_saved_on_stack_p)
+    {
+      cache->saved_regs[TILEGX_LR_REGNUM].realreg = TILEGX_LR_REGNUM;
+      cache->saved_regs[TILEGX_LR_REGNUM].addr =
+        cache->saved_regs[TILEGX_SP_REGNUM].addr;
+    }
+
   return prolog_end;
 }
 
 /* This is the implementation of gdbarch method skip_prologue.  */
 
 static CORE_ADDR
-tilegx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
+tilegx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
 {
-  struct symtab_and_line sal;
-  CORE_ADDR func_start, func_end;
+  CORE_ADDR func_start, end_pc;
+  struct obj_section *s;
 
   /* This is the preferred method, find the end of the prologue by
      using the debugging information.  */
-  if (find_pc_partial_function (pc, NULL, &func_start, &func_end))
+  if (find_pc_partial_function (start_pc, NULL, &func_start, NULL))
     {
-        sal = find_pc_line (func_start, 0);
+      CORE_ADDR post_prologue_pc
+        = skip_prologue_using_sal (gdbarch, func_start);
 
-        if (sal.end < func_end && pc <= sal.end)
-          return sal.end;
+      if (post_prologue_pc != 0)
+        return max (start_pc, post_prologue_pc);
     }
 
+  /* Don't straddle a section boundary.  */
+  s = find_pc_section (start_pc);
+  end_pc = start_pc + 8 * TILEGX_BUNDLE_SIZE_IN_BYTES;
+  if (s != NULL)
+    end_pc = min (end_pc, obj_section_endaddr (s));
+
   /* Otherwise, try to skip prologue the hard way.  */
   return tilegx_analyze_prologue (gdbarch,
-                                  pc, pc + 8 * TILEGX_BUNDLE_SIZE_IN_BYTES,
+                                  start_pc,
+                                  end_pc,
                                   NULL, NULL);
 }
 
 /* This is the implementation of gdbarch method in_function_epilogue_p.  */
 
 static int
 tilegx_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
   CORE_ADDR func_addr = 0, func_end = 0;
 
   if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
     {
       ULONGEST inst, inst2;
       CORE_ADDR addr = func_end - TILEGX_BUNDLE_SIZE_IN_BYTES;
 
       /* FIXME: Find the actual epilogue.  */
       /* HACK: Just assume the final bundle is the "ret" instruction".  */
       if (pc > addr)
         return 1;
     }
   return 0;
 }
 
+/* This is the implementation of gdbarch method get_longjmp_target.  */
+
+static int
+tilegx_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
+{
+  struct gdbarch *gdbarch = get_frame_arch (frame);
+  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+  CORE_ADDR jb_addr;
+  gdb_byte buf[8];
+
+  jb_addr = get_frame_register_unsigned (frame, TILEGX_R0_REGNUM);
+
+  /* TileGX jmp_buf contains 32 elements of type __uint_reg_t which
+     has a size of 8 bytes.  The return address is stored in the 25th
+     slot.  */
+  if (target_read_memory (jb_addr + 25 * 8, buf, 8))
+    return 0;
+
+  *pc = extract_unsigned_integer (buf, 8, byte_order);
+
+  return 1;
+}
+
+/* by assigning the 'faultnum' reg in kernel pt_regs with this value,
+   kernel do_signal will not check r0. see tilegx kernel/signal.c
+   for details.  */
+#define INT_SWINT_1_SIGRETURN (~0)
+
+/* Implement the "write_pc" gdbarch method.  */
+
+static void
+tilegx_write_pc (struct regcache *regcache, CORE_ADDR pc)
+{
+  regcache_cooked_write_unsigned (regcache, TILEGX_PC_REGNUM, pc);
+
+  /* We must be careful with modifying the program counter.  If we
+     just interrupted a system call, the kernel might try to restart
+     it when we resume the inferior.  On restarting the system call,
+     the kernel will try backing up the program counter even though it
+     no longer points at the system call.  This typically results in a
+     SIGSEGV or SIGILL.  We can prevent this by writing INT_SWINT_1_SIGRETURN
+     in the "faultnum" pseudo-register.
+
+     Note that "faultnum" is saved when setting up a dummy call frame.
+     This means that it is properly restored when that frame is
+     popped, and that the interrupted system call will be restarted
+     when we resume the inferior on return from a function call from
+     within GDB.  In all other cases the system call will not be
+     restarted.  */
+  regcache_cooked_write_unsigned (regcache, TILEGX_FAULTNUM_REGNUM,
+                                  INT_SWINT_1_SIGRETURN);
+}
+
 /* This is the implementation of gdbarch method breakpoint_from_pc.  */
 
 static const unsigned char *
 tilegx_breakpoint_from_pc (struct gdbarch *gdbarch,
                            CORE_ADDR *pcptr, int *lenptr)
 {
   /* 64-bit pattern for a { bpt ; nop } bundle.  */
   static const unsigned char breakpoint[] =
     { 0x00, 0x50, 0x48, 0x51, 0xae, 0x44, 0x6a, 0x28 };
 
@@ skipping 17 matching lines @@
   cache = FRAME_OBSTACK_ZALLOC (struct tilegx_frame_cache);
   *this_cache = cache;
   cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
   cache->base = 0;
   cache->start_pc = get_frame_func (this_frame);
   current_pc = get_frame_pc (this_frame);
 
   cache->base = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM);
   trad_frame_set_value (cache->saved_regs, TILEGX_SP_REGNUM, cache->base);
 
-  cache->saved_regs[TILEGX_PC_REGNUM] = cache->saved_regs[TILEGX_LR_REGNUM];
   if (cache->start_pc)
     tilegx_analyze_prologue (gdbarch, cache->start_pc, current_pc,
                              cache, this_frame);
 
+  cache->saved_regs[TILEGX_PC_REGNUM] = cache->saved_regs[TILEGX_LR_REGNUM];
+
   return cache;
 }
 
 /* Retrieve the value of REGNUM in FRAME.  */
 
 static struct value*
 tilegx_frame_prev_register (struct frame_info *this_frame,
                             void **this_cache,
                             int regnum)
 {
@@ skipping 69 matching lines @@
 }
 
 
 /* We cannot read/write the "special" registers.  */
 
 static int
 tilegx_cannot_reference_register (struct gdbarch *gdbarch, int regno)
 {
   if (regno >= 0 && regno < TILEGX_NUM_EASY_REGS)
     return 0;
-  else if (regno == TILEGX_PC_REGNUM)
+  else if (regno == TILEGX_PC_REGNUM
+           || regno == TILEGX_FAULTNUM_REGNUM)
     return 0;
   else
     return 1;
 }
 
 static struct gdbarch *
 tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 {
   struct gdbarch *gdbarch;
   int arch_size = 64;
@@ skipping 24 matching lines @@
      that there are 65 registers, and no "pseudo registers".  */
   set_gdbarch_num_regs (gdbarch, TILEGX_NUM_REGS);
   set_gdbarch_num_pseudo_regs (gdbarch, 0);
 
   set_gdbarch_sp_regnum (gdbarch, TILEGX_SP_REGNUM);
   set_gdbarch_pc_regnum (gdbarch, TILEGX_PC_REGNUM);
 
   set_gdbarch_register_name (gdbarch, tilegx_register_name);
   set_gdbarch_register_type (gdbarch, tilegx_register_type);
 
-  set_gdbarch_char_signed (gdbarch, 0);
   set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
   set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
   set_gdbarch_long_bit (gdbarch, arch_size);
   set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
 
   set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
   set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
   set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
 
   set_gdbarch_ptr_bit (gdbarch, arch_size);
@@ skipping 17 matching lines @@
   set_gdbarch_skip_prologue (gdbarch, tilegx_skip_prologue);
 
   set_gdbarch_in_function_epilogue_p (gdbarch,
                                       tilegx_in_function_epilogue_p);
 
   /* Map debug registers into internal register numbers.  */
   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, tilegx_dwarf2_reg_to_regnum);
 
   /* These values and methods are used when gdb calls a target function.  */
   set_gdbarch_push_dummy_call (gdbarch, tilegx_push_dummy_call);
+  set_gdbarch_get_longjmp_target (gdbarch, tilegx_get_longjmp_target);
+  set_gdbarch_write_pc (gdbarch, tilegx_write_pc);
   set_gdbarch_breakpoint_from_pc (gdbarch, tilegx_breakpoint_from_pc);
   set_gdbarch_return_value (gdbarch, tilegx_return_value);
 
   set_gdbarch_print_insn (gdbarch, print_insn_tilegx);
 
   gdbarch_init_osabi (info, gdbarch);
 
   dwarf2_append_unwinders (gdbarch);
   frame_unwind_append_unwinder (gdbarch, &tilegx_frame_unwind);
 
   return gdbarch;
 }
 
 /* Provide a prototype to silence -Wmissing-prototypes.  */
 extern initialize_file_ftype _initialize_tilegx_tdep;
 
 void
 _initialize_tilegx_tdep (void)
 {
   register_gdbarch_init (bfd_arch_tilegx, tilegx_gdbarch_init);
 }