Fix build.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/simulator.h"
 #include "vm/runtime_entry.h"
@@ skipping 1228 matching lines @@
   if (object.IsNull() ||
       object.IsSmi() ||
       (object.raw() == Bool::True().raw()) ||
       (object.raw() == Bool::False().raw())) {
     // This object is never relocated; do not use object pool.
     LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw()));
     return;
   }
   const int32_t offset =
       Array::data_offset() + 4*AddObject(object) - kHeapObjectTag;
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (Address::CanHoldLoadOffset(kLoadWord, offset, &offset_mask)) {
     ldr(rd, Address(PP, offset));
   } else {
     int32_t offset_hi = offset & ~offset_mask;  // signed
     uint32_t offset_lo = offset & offset_mask;  // unsigned
     AddImmediate(rd, PP, offset_hi);
     ldr(rd, Address(rd, offset_lo));
   }
 }
 
@@ skipping 142 matching lines @@
 }
 
 
 void Assembler::BranchLinkPatchable(const ExternalLabel* label) {
   // Make sure that class CallPattern is able to patch the label referred
   // to by this code sequence.
   // For added code robustness, use 'blx lr' in a patchable sequence and
   // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors).
   const int32_t offset =
       Array::data_offset() + 4*AddExternalLabel(label) - kHeapObjectTag;
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (Address::CanHoldLoadOffset(kLoadWord, offset, &offset_mask)) {
     ldr(LR, Address(PP, offset));
   } else {
     int32_t offset_hi = offset & ~offset_mask;  // signed
     uint32_t offset_lo = offset & offset_mask;  // unsigned
     // Inline a simplified version of AddImmediate(LR, CP, offset_hi).
     ShifterOperand shifter_op;
     if (ShifterOperand::CanHold(offset_hi, &shifter_op)) {
       add(LR, PP, shifter_op);
     } else {
@@ skipping 14 matching lines @@
   // TODO(regis): Revisit this code sequence.
   LoadImmediate(IP, label->address());  // Target address is never patched.
   str(PC, ad);
   blx(IP);  // Use blx instruction so that the return branch prediction works.
 }
 
 
 void Assembler::BranchLinkOffset(Register base, int offset) {
   ASSERT(base != PC);
   ASSERT(base != IP);
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (Address::CanHoldLoadOffset(kLoadWord, offset, &offset_mask)) {
     ldr(IP, Address(base, offset));
   } else {
     int offset_hi = offset & ~offset_mask;
     int offset_lo = offset & offset_mask;
     ShifterOperand offset_hi_op;
     if (ShifterOperand::CanHold(offset_hi, &offset_hi_op)) {
       add(IP, base, offset_hi_op);
       ldr(IP, Address(IP, offset_lo));
     } else {
@@ skipping 46 matching lines @@
     vmovdrr(dd, IP, scratch, cond);
   }
 }
 
 
 void Assembler::LoadFromOffset(LoadOperandType type,
                                Register reg,
                                Register base,
                                int32_t offset,
                                Condition cond) {
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (!Address::CanHoldLoadOffset(type, offset, &offset_mask)) {
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
   switch (type) {
     case kLoadSignedByte:
       ldrsb(reg, Address(base, offset), cond);
       break;
@@ skipping 16 matching lines @@
       UNREACHABLE();
   }
 }
 
 
 void Assembler::StoreToOffset(StoreOperandType type,
                               Register reg,
                               Register base,
                               int32_t offset,
                               Condition cond) {
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (!Address::CanHoldStoreOffset(type, offset, &offset_mask)) {
     ASSERT(reg != IP);
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
   switch (type) {
     case kStoreByte:
       strb(reg, Address(base, offset), cond);
@@ skipping 10 matching lines @@
     default:
       UNREACHABLE();
   }
 }
 
 
 void Assembler::LoadSFromOffset(SRegister reg,
                                 Register base,
                                 int32_t offset,
                                 Condition cond) {
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (!Address::CanHoldLoadOffset(kLoadSWord, offset, &offset_mask)) {
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
   vldrs(reg, Address(base, offset), cond);
 }
 
 
 void Assembler::StoreSToOffset(SRegister reg,
                                Register base,
                                int32_t offset,
                                Condition cond) {
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (!Address::CanHoldStoreOffset(kStoreSWord, offset, &offset_mask)) {
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
   vstrs(reg, Address(base, offset), cond);
 }
 
 
 void Assembler::LoadDFromOffset(DRegister reg,
                                 Register base,
                                 int32_t offset,
                                 Condition cond) {
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (!Address::CanHoldLoadOffset(kLoadDWord, offset, &offset_mask)) {
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
   vldrd(reg, Address(base, offset), cond);
 }
 
 
 void Assembler::StoreDToOffset(DRegister reg,
                                Register base,
                                int32_t offset,
                                Condition cond) {
-  int32_t offset_mask;
+  int32_t offset_mask = 0;
   if (!Address::CanHoldStoreOffset(kStoreDWord, offset, &offset_mask)) {
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
   vstrd(reg, Address(base, offset), cond);
 }
 
 
@@ skipping 308 matching lines @@
   // Do not reuse an existing entry, since each reference may be patched
   // independently.
   object_pool_.Add(smi);
   return object_pool_.Length() - 1;
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM