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Unified Diff: src/compiler/x64/code-generator-x64.cc

Issue 1242303005: [turbofan]: Elide extra move when accessing stack or frame register (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: src/compiler/code-generator.cc Created 5 years, 5 months ago
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Index: src/compiler/x64/code-generator-x64.cc
diff --git a/src/compiler/x64/code-generator-x64.cc b/src/compiler/x64/code-generator-x64.cc
index bdce0832011e4ce8a1c21a301c1672535e7f7171..902765f6f94dd4c928c36137aa0da4063be7f5bb 100644
--- a/src/compiler/x64/code-generator-x64.cc
+++ b/src/compiler/x64/code-generator-x64.cc
@@ -193,26 +193,26 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
} // namespace
-#define ASSEMBLE_UNOP(asm_instr) \
- do { \
- if (instr->Output()->IsRegister()) { \
- __ asm_instr(i.OutputRegister()); \
- } else { \
- __ asm_instr(i.OutputOperand()); \
- } \
+#define ASSEMBLE_UNOP(asm_instr) \
+ do { \
+ if (instr->Output()->GeneratesRegister()) { \
+ __ asm_instr(i.OutputRegister()); \
+ } else { \
+ __ asm_instr(i.OutputOperand()); \
+ } \
} while (0)
#define ASSEMBLE_BINOP(asm_instr) \
do { \
if (HasImmediateInput(instr, 1)) { \
- if (instr->InputAt(0)->IsRegister()) { \
+ if (instr->InputAt(0)->GeneratesRegister()) { \
__ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
} else { \
__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
} \
} else { \
- if (instr->InputAt(1)->IsRegister()) { \
+ if (instr->InputAt(1)->GeneratesRegister()) { \
__ asm_instr(i.InputRegister(0), i.InputRegister(1)); \
} else { \
__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
@@ -224,7 +224,7 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
#define ASSEMBLE_MULT(asm_instr) \
do { \
if (HasImmediateInput(instr, 1)) { \
- if (instr->InputAt(0)->IsRegister()) { \
+ if (instr->InputAt(0)->GeneratesRegister()) { \
__ asm_instr(i.OutputRegister(), i.InputRegister(0), \
i.InputImmediate(1)); \
} else { \
@@ -232,7 +232,7 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
i.InputImmediate(1)); \
} \
} else { \
- if (instr->InputAt(1)->IsRegister()) { \
+ if (instr->InputAt(1)->GeneratesRegister()) { \
__ asm_instr(i.OutputRegister(), i.InputRegister(1)); \
} else { \
__ asm_instr(i.OutputRegister(), i.InputOperand(1)); \
@@ -244,13 +244,13 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
#define ASSEMBLE_SHIFT(asm_instr, width) \
do { \
if (HasImmediateInput(instr, 1)) { \
- if (instr->Output()->IsRegister()) { \
+ if (instr->Output()->GeneratesRegister()) { \
__ asm_instr(i.OutputRegister(), Immediate(i.InputInt##width(1))); \
} else { \
__ asm_instr(i.OutputOperand(), Immediate(i.InputInt##width(1))); \
} \
} else { \
- if (instr->Output()->IsRegister()) { \
+ if (instr->Output()->GeneratesRegister()) { \
__ asm_instr##_cl(i.OutputRegister()); \
} else { \
__ asm_instr##_cl(i.OutputOperand()); \
@@ -263,7 +263,7 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
do { \
if (instr->addressing_mode() != kMode_None) { \
__ asm_instr(i.OutputRegister(), i.MemoryOperand()); \
- } else if (instr->InputAt(0)->IsRegister()) { \
+ } else if (instr->InputAt(0)->GeneratesRegister()) { \
__ asm_instr(i.OutputRegister(), i.InputRegister(0)); \
} else { \
__ asm_instr(i.OutputRegister(), i.InputOperand(0)); \
@@ -311,7 +311,7 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
auto index1 = i.InputRegister(1); \
auto index2 = i.InputInt32(2); \
OutOfLineCode* ool; \
- if (instr->InputAt(3)->IsRegister()) { \
+ if (instr->InputAt(3)->GeneratesRegister()) { \
auto length = i.InputRegister(3); \
DCHECK_EQ(0, index2); \
__ cmpl(index1, length); \
@@ -364,7 +364,7 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
auto index1 = i.InputRegister(1); \
auto index2 = i.InputInt32(2); \
OutOfLineCode* ool; \
- if (instr->InputAt(3)->IsRegister()) { \
+ if (instr->InputAt(3)->GeneratesRegister()) { \
auto length = i.InputRegister(3); \
DCHECK_EQ(0, index2); \
__ cmpl(index1, length); \
@@ -419,7 +419,7 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
auto index1 = i.InputRegister(1); \
auto index2 = i.InputInt32(2); \
auto value = i.InputDoubleRegister(4); \
- if (instr->InputAt(3)->IsRegister()) { \
+ if (instr->InputAt(3)->GeneratesRegister()) { \
auto length = i.InputRegister(3); \
DCHECK_EQ(0, index2); \
Label done; \
@@ -472,7 +472,7 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
auto buffer = i.InputRegister(0); \
auto index1 = i.InputRegister(1); \
auto index2 = i.InputInt32(2); \
- if (instr->InputAt(3)->IsRegister()) { \
+ if (instr->InputAt(3)->GeneratesRegister()) { \
auto length = i.InputRegister(3); \
DCHECK_EQ(0, index2); \
Label done; \
@@ -522,7 +522,7 @@ class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \
do { \
- if (instr->InputAt(4)->IsRegister()) { \
+ if (instr->InputAt(4)->GeneratesRegister()) { \
Register value = i.InputRegister(4); \
ASSEMBLE_CHECKED_STORE_INTEGER_IMPL(asm_instr, Register); \
} else { \
@@ -685,14 +685,14 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
ASSEMBLE_MULT(imulq);
break;
case kX64ImulHigh32:
- if (instr->InputAt(1)->IsRegister()) {
+ if (instr->InputAt(1)->GeneratesRegister()) {
__ imull(i.InputRegister(1));
} else {
__ imull(i.InputOperand(1));
}
break;
case kX64UmulHigh32:
- if (instr->InputAt(1)->IsRegister()) {
+ if (instr->InputAt(1)->GeneratesRegister()) {
__ mull(i.InputRegister(1));
} else {
__ mull(i.InputOperand(1));
@@ -763,7 +763,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
ASSEMBLE_SHIFT(rorq, 6);
break;
case kX64Lzcnt32:
- if (instr->InputAt(0)->IsRegister()) {
+ if (instr->InputAt(0)->GeneratesRegister()) {
__ Lzcntl(i.OutputRegister(), i.InputRegister(0));
} else {
__ Lzcntl(i.OutputRegister(), i.InputOperand(0));
@@ -913,14 +913,14 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
break;
}
case kSSEInt32ToFloat64:
- if (instr->InputAt(0)->IsRegister()) {
+ if (instr->InputAt(0)->GeneratesRegister()) {
__ cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
} else {
__ cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
}
break;
case kSSEUint32ToFloat64:
- if (instr->InputAt(0)->IsRegister()) {
+ if (instr->InputAt(0)->GeneratesRegister()) {
__ movl(kScratchRegister, i.InputRegister(0));
} else {
__ movl(kScratchRegister, i.InputOperand(0));
@@ -942,21 +942,21 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
}
break;
case kSSEFloat64InsertLowWord32:
- if (instr->InputAt(1)->IsRegister()) {
+ if (instr->InputAt(1)->GeneratesRegister()) {
__ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 0);
} else {
__ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0);
}
break;
case kSSEFloat64InsertHighWord32:
- if (instr->InputAt(1)->IsRegister()) {
+ if (instr->InputAt(1)->GeneratesRegister()) {
__ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 1);
} else {
__ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1);
}
break;
case kSSEFloat64LoadLowWord32:
- if (instr->InputAt(0)->IsRegister()) {
+ if (instr->InputAt(0)->GeneratesRegister()) {
__ movd(i.OutputDoubleRegister(), i.InputRegister(0));
} else {
__ movd(i.OutputDoubleRegister(), i.InputOperand(0));
@@ -1117,7 +1117,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kX64Movl:
if (instr->HasOutput()) {
if (instr->addressing_mode() == kMode_None) {
- if (instr->InputAt(0)->IsRegister()) {
+ if (instr->InputAt(0)->GeneratesRegister()) {
__ movl(i.OutputRegister(), i.InputRegister(0));
} else {
__ movl(i.OutputRegister(), i.InputOperand(0));
@@ -1217,7 +1217,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
if (HasImmediateInput(instr, 0)) {
__ pushq(i.InputImmediate(0));
} else {
- if (instr->InputAt(0)->IsRegister()) {
+ if (instr->InputAt(0)->GeneratesRegister()) {
__ pushq(i.InputRegister(0));
} else {
__ pushq(i.InputOperand(0));
@@ -1591,18 +1591,18 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
X64OperandConverter g(this, NULL);
// Dispatch on the source and destination operand kinds. Not all
// combinations are possible.
- if (source->IsRegister()) {
- DCHECK(destination->IsRegister() || destination->IsStackSlot());
+ if (source->GeneratesRegister()) {
+ DCHECK(destination->GeneratesRegister() || destination->IsStackSlot());
Register src = g.ToRegister(source);
- if (destination->IsRegister()) {
+ if (destination->GeneratesRegister()) {
__ movq(g.ToRegister(destination), src);
} else {
__ movq(g.ToOperand(destination), src);
}
} else if (source->IsStackSlot()) {
- DCHECK(destination->IsRegister() || destination->IsStackSlot());
+ DCHECK(destination->GeneratesRegister() || destination->IsStackSlot());
Operand src = g.ToOperand(source);
- if (destination->IsRegister()) {
+ if (destination->GeneratesRegister()) {
Register dst = g.ToRegister(destination);
__ movq(dst, src);
} else {
@@ -1616,9 +1616,10 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
} else if (source->IsConstant()) {
ConstantOperand* constant_source = ConstantOperand::cast(source);
Constant src = g.ToConstant(constant_source);
- if (destination->IsRegister() || destination->IsStackSlot()) {
- Register dst = destination->IsRegister() ? g.ToRegister(destination)
- : kScratchRegister;
+ if (destination->GeneratesRegister() || destination->IsStackSlot()) {
+ Register dst = destination->GeneratesRegister()
+ ? g.ToRegister(destination)
+ : kScratchRegister;
switch (src.type()) {
case Constant::kInt32:
// TODO(dcarney): don't need scratch in this case.
@@ -1712,10 +1713,10 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
X64OperandConverter g(this, NULL);
// Dispatch on the source and destination operand kinds. Not all
// combinations are possible.
- if (source->IsRegister() && destination->IsRegister()) {
+ if (source->GeneratesRegister() && destination->GeneratesRegister()) {
// Register-register.
__ xchgq(g.ToRegister(source), g.ToRegister(destination));
- } else if (source->IsRegister() && destination->IsStackSlot()) {
+ } else if (source->GeneratesRegister() && destination->IsStackSlot()) {
Register src = g.ToRegister(source);
Operand dst = g.ToOperand(destination);
__ xchgq(src, dst);
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