[turbofan]: Elide extra move when accessing stack or frame register

src/compiler/mips/code-generator-mips.cc

Index: src/compiler/mips/code-generator-mips.cc
diff --git a/src/compiler/mips/code-generator-mips.cc b/src/compiler/mips/code-generator-mips.cc
index 66ffb6f898f0e718efbbd22b8c8f3543bca6d6f4..e2f8710242b325b2499289df00a28b0033b49e73 100644
--- a/src/compiler/mips/code-generator-mips.cc
+++ b/src/compiler/mips/code-generator-mips.cc
@@ -80,7 +80,7 @@ class MipsOperandConverter final : public InstructionOperandConverter {
 
   Operand InputOperand(size_t index) {
     InstructionOperand* op = instr_->InputAt(index);
-    if (op->IsRegister()) {
+    if (op->GeneratesRegister()) {
       return Operand(ToRegister(op));
     }
     return InputImmediate(index);
@@ -106,7 +106,7 @@ class MipsOperandConverter final : public InstructionOperandConverter {
 
   MemOperand ToMemOperand(InstructionOperand* op) const {
     DCHECK(op != NULL);
-    DCHECK(!op->IsRegister());
+    DCHECK(!op->GeneratesRegister());
     DCHECK(!op->IsDoubleRegister());
     DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
     // The linkage computes where all spill slots are located.
@@ -118,7 +118,7 @@ class MipsOperandConverter final : public InstructionOperandConverter {
 
 
 static inline bool HasRegisterInput(Instruction* instr, size_t index) {
-  return instr->InputAt(index)->IsRegister();
+  return instr->InputAt(index)->GeneratesRegister();
 }
 
 
@@ -303,7 +303,7 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
   do {                                                                        \
     auto result = i.Output##width##Register();                                \
     auto ool = new (zone()) OutOfLineLoad##width(this, result);               \
-    if (instr->InputAt(0)->IsRegister()) {                                    \
+    if (instr->InputAt(0)->GeneratesRegister()) {                             \
       auto offset = i.InputRegister(0);                                       \
       __ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \
       __ addu(at, i.InputRegister(2), offset);                                \
@@ -321,7 +321,7 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
   do {                                                                        \
     auto result = i.OutputRegister();                                         \
     auto ool = new (zone()) OutOfLineLoadInteger(this, result);               \
-    if (instr->InputAt(0)->IsRegister()) {                                    \
+    if (instr->InputAt(0)->GeneratesRegister()) {                             \
       auto offset = i.InputRegister(0);                                       \
       __ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \
       __ addu(at, i.InputRegister(2), offset);                                \
@@ -338,7 +338,7 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
 #define ASSEMBLE_CHECKED_STORE_FLOAT(width, asm_instr)                 \
   do {                                                                 \
     Label done;                                                        \
-    if (instr->InputAt(0)->IsRegister()) {                             \
+    if (instr->InputAt(0)->GeneratesRegister()) {                      \
       auto offset = i.InputRegister(0);                                \
       auto value = i.Input##width##Register(2);                        \
       __ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \
@@ -357,7 +357,7 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr)                      \
   do {                                                                 \
     Label done;                                                        \
-    if (instr->InputAt(0)->IsRegister()) {                             \
+    if (instr->InputAt(0)->GeneratesRegister()) {                      \
       auto offset = i.InputRegister(0);                                \
       auto value = i.InputRegister(2);                                 \
       __ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \
@@ -553,7 +553,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       __ Clz(i.OutputRegister(), i.InputRegister(0));
       break;
     case kMipsShl:
-      if (instr->InputAt(1)->IsRegister()) {
+      if (instr->InputAt(1)->GeneratesRegister()) {
         __ sllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
       } else {
         int32_t imm = i.InputOperand(1).immediate();
@@ -561,7 +561,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       }
       break;
     case kMipsShr:
-      if (instr->InputAt(1)->IsRegister()) {
+      if (instr->InputAt(1)->GeneratesRegister()) {
         __ srlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
       } else {
         int32_t imm = i.InputOperand(1).immediate();
@@ -569,7 +569,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
       }
       break;
     case kMipsSar:
-      if (instr->InputAt(1)->IsRegister()) {
+      if (instr->InputAt(1)->GeneratesRegister()) {
         __ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
       } else {
         int32_t imm = i.InputOperand(1).immediate();
@@ -1174,18 +1174,18 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
   MipsOperandConverter g(this, NULL);
   // Dispatch on the source and destination operand kinds.  Not all
   // combinations are possible.
-  if (source->IsRegister()) {
-    DCHECK(destination->IsRegister() || destination->IsStackSlot());
+  if (source->GeneratesRegister()) {
+    DCHECK(destination->GeneratesRegister() || destination->IsStackSlot());
     Register src = g.ToRegister(source);
-    if (destination->IsRegister()) {
+    if (destination->GeneratesRegister()) {
       __ mov(g.ToRegister(destination), src);
     } else {
       __ sw(src, g.ToMemOperand(destination));
     }
   } else if (source->IsStackSlot()) {
-    DCHECK(destination->IsRegister() || destination->IsStackSlot());
+    DCHECK(destination->GeneratesRegister() || destination->IsStackSlot());
     MemOperand src = g.ToMemOperand(source);
-    if (destination->IsRegister()) {
+    if (destination->GeneratesRegister()) {
       __ lw(g.ToRegister(destination), src);
     } else {
       Register temp = kScratchReg;
@@ -1194,9 +1194,10 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
     }
   } else if (source->IsConstant()) {
     Constant src = g.ToConstant(source);
-    if (destination->IsRegister() || destination->IsStackSlot()) {
-      Register dst =
-          destination->IsRegister() ? g.ToRegister(destination) : kScratchReg;
+    if (destination->GeneratesRegister() || destination->IsStackSlot()) {
+      Register dst = destination->GeneratesRegister()
+                         ? g.ToRegister(destination)
+                         : kScratchReg;
       switch (src.type()) {
         case Constant::kInt32:
           __ li(dst, Operand(src.ToInt32()));
@@ -1280,11 +1281,11 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
   MipsOperandConverter g(this, NULL);
   // Dispatch on the source and destination operand kinds.  Not all
   // combinations are possible.
-  if (source->IsRegister()) {
+  if (source->GeneratesRegister()) {
     // Register-register.
     Register temp = kScratchReg;
     Register src = g.ToRegister(source);
-    if (destination->IsRegister()) {
+    if (destination->GeneratesRegister()) {
       Register dst = g.ToRegister(destination);
       __ Move(temp, src);
       __ Move(src, dst);