[turbofan] Deferred block spilling heuristic - first step.

test/unittests/compiler/register-allocator-unittest.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/pipeline.h"
 #include "test/unittests/compiler/instruction-sequence-unittest.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
+
+namespace {
+
+// We can't just use the size of the moves collection, because of
+// redundant moves which need to be discounted.
+int GetMoveCount(const ParallelMove& moves) {
+  int move_count = 0;
+  for (auto move : moves) {
+    if (move->IsEliminated() || move->IsRedundant()) continue;
+    ++move_count;
+  }
+  return move_count;
+}
+}
+
+
 class RegisterAllocatorTest : public InstructionSequenceTest {
  public:
   void Allocate() {
     WireBlocks();
     Pipeline::AllocateRegistersForTesting(config(), sequence(), true);
   }
 };
 
 
 TEST_F(RegisterAllocatorTest, CanAllocateThreeRegisters) {
@@ skipping 463 matching lines @@
   StartBlock();
   // Force c to split within to_spill's definition.
   EmitI(Reg(c));
   EmitI(Reg(to_spill));
   EndBlock(Last());
 
   Allocate();
 }
 
 
+TEST_F(RegisterAllocatorTest, DeferredBlockSpill) {
+  StartBlock();  // B0
+  auto var = EmitOI(Reg(0));
+  EndBlock(Branch(Reg(var), 1, 2));
+
+  StartBlock();  // B1
+  EndBlock(Jump(3));
+
+  StartBlock(true);  // B2
+  EmitCall(Slot(-1), Slot(var));
+  EndBlock();
+
+  StartBlock();  // B3
+  EmitNop();
+  EndBlock();
+
+  StartBlock();  // B4
+  Return(Reg(var, 0));
+  EndBlock();
+
+  Allocate();
+
+  int expect_0 = FLAG_turbo_greedy_regalloc ? 1 : 3;
+  int expect_1 = FLAG_turbo_greedy_regalloc ? 3 : 1;

[Jarin, 2015/07/22 12:59:36]

Could you please explain what the magic constants 1 and 3 are and link them to
the appropriate instructions?

[Mircea Trofin, 2015/07/23 02:20:04]

Done.

+
+  const ParallelMove* moves =
+      sequence()->InstructionAt(expect_0)->GetOrCreateParallelMove(
+          Instruction::START, zone());
+
+  EXPECT_EQ(0, GetMoveCount(*moves));

[Jarin, 2015/07/22 12:59:36]

Please explain what you are checking here, this will be next to impossible to
understand if it fails.

[Mircea Trofin, 2015/07/23 02:20:04]

Done, but please let me know if, still, the comment and new var names form too
weak of a context for a developer to understand what's going on.

+
+  moves = sequence()->InstructionAt(expect_1)->GetOrCreateParallelMove(
+      Instruction::START, zone());
+  EXPECT_EQ(1, GetMoveCount(*moves));
+  for (auto move : *moves) {
+    if (move->IsEliminated() || move->IsRedundant()) continue;
+    EXPECT_TRUE(move->source().IsRegister());
+    EXPECT_TRUE(move->destination().IsStackSlot());
+  }
+}
+
+
 namespace {
 
 enum class ParameterType { kFixedSlot, kSlot, kRegister, kFixedRegister };
 
 const ParameterType kParameterTypes[] = {
     ParameterType::kFixedSlot, ParameterType::kSlot, ParameterType::kRegister,
     ParameterType::kFixedRegister};
 
 class SlotConstraintTest : public RegisterAllocatorTest,
                            public ::testing::WithParamInterface<
@@ skipping 63 matching lines @@
 INSTANTIATE_TEST_CASE_P(
     RegisterAllocatorTest, SlotConstraintTest,
     ::testing::Combine(::testing::ValuesIn(kParameterTypes),
                        ::testing::Range(0, SlotConstraintTest::kMaxVariant)));
 
 #endif  // GTEST_HAS_COMBINE
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8