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1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// | 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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235 | 235 |
236 private: | 236 private: |
237 OperandARM32FlexReg(Cfg *Func, Type Ty, Variable *Reg, ShiftKind ShiftOp, | 237 OperandARM32FlexReg(Cfg *Func, Type Ty, Variable *Reg, ShiftKind ShiftOp, |
238 Operand *ShiftAmt); | 238 Operand *ShiftAmt); |
239 | 239 |
240 Variable *Reg; | 240 Variable *Reg; |
241 ShiftKind ShiftOp; | 241 ShiftKind ShiftOp; |
242 Operand *ShiftAmt; | 242 Operand *ShiftAmt; |
243 }; | 243 }; |
244 | 244 |
| 245 /// StackVariable represents a Var that isn't assigned a register (stack-only). |
| 246 /// It is assigned a stack slot, but the slot's offset may be too large to |
| 247 /// represent in the native addressing mode, and so it has a separate |
| 248 /// base register from SP/FP, where the offset from that base register is |
| 249 /// then in range. |
| 250 class StackVariable final : public Variable { |
| 251 StackVariable() = delete; |
| 252 StackVariable(const StackVariable &) = delete; |
| 253 StackVariable &operator=(const StackVariable &) = delete; |
| 254 |
| 255 public: |
| 256 static StackVariable *create(Cfg *Func, Type Ty, SizeT Index) { |
| 257 return new (Func->allocate<StackVariable>()) StackVariable(Ty, Index); |
| 258 } |
| 259 const static OperandKind StackVariableKind = |
| 260 static_cast<OperandKind>(kVariable_Target); |
| 261 static bool classof(const Operand *Operand) { |
| 262 return Operand->getKind() == StackVariableKind; |
| 263 } |
| 264 void setBaseRegNum(int32_t RegNum) { BaseRegNum = RegNum; } |
| 265 int32_t getBaseRegNum() const override { return BaseRegNum; } |
| 266 // Inherit dump() and emit() from Variable. |
| 267 |
| 268 private: |
| 269 StackVariable(Type Ty, SizeT Index) |
| 270 : Variable(StackVariableKind, Ty, Index) {} |
| 271 int32_t BaseRegNum = Variable::NoRegister; |
| 272 }; |
| 273 |
245 /// Base class for ARM instructions. While most ARM instructions can be | 274 /// Base class for ARM instructions. While most ARM instructions can be |
246 /// conditionally executed, a few of them are not predicable (halt, | 275 /// conditionally executed, a few of them are not predicable (halt, |
247 /// memory barriers, etc.). | 276 /// memory barriers, etc.). |
248 class InstARM32 : public InstTarget { | 277 class InstARM32 : public InstTarget { |
249 InstARM32() = delete; | 278 InstARM32() = delete; |
250 InstARM32(const InstARM32 &) = delete; | 279 InstARM32(const InstARM32 &) = delete; |
251 InstARM32 &operator=(const InstARM32 &) = delete; | 280 InstARM32 &operator=(const InstARM32 &) = delete; |
252 | 281 |
253 public: | 282 public: |
254 enum InstKindARM32 { | 283 enum InstKindARM32 { |
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771 /// hard to pull that from the generic SrcAmount operand. | 800 /// hard to pull that from the generic SrcAmount operand. |
772 static InstARM32AdjustStack *create(Cfg *Func, Variable *SP, SizeT Amount, | 801 static InstARM32AdjustStack *create(Cfg *Func, Variable *SP, SizeT Amount, |
773 Operand *SrcAmount) { | 802 Operand *SrcAmount) { |
774 return new (Func->allocate<InstARM32AdjustStack>()) | 803 return new (Func->allocate<InstARM32AdjustStack>()) |
775 InstARM32AdjustStack(Func, SP, Amount, SrcAmount); | 804 InstARM32AdjustStack(Func, SP, Amount, SrcAmount); |
776 } | 805 } |
777 void emit(const Cfg *Func) const override; | 806 void emit(const Cfg *Func) const override; |
778 void emitIAS(const Cfg *Func) const override; | 807 void emitIAS(const Cfg *Func) const override; |
779 void dump(const Cfg *Func) const override; | 808 void dump(const Cfg *Func) const override; |
780 static bool classof(const Inst *Inst) { return isClassof(Inst, Adjuststack); } | 809 static bool classof(const Inst *Inst) { return isClassof(Inst, Adjuststack); } |
| 810 SizeT getAmount() const { return Amount; } |
781 | 811 |
782 private: | 812 private: |
783 InstARM32AdjustStack(Cfg *Func, Variable *SP, SizeT Amount, | 813 InstARM32AdjustStack(Cfg *Func, Variable *SP, SizeT Amount, |
784 Operand *SrcAmount); | 814 Operand *SrcAmount); |
785 const SizeT Amount; | 815 const SizeT Amount; |
786 }; | 816 }; |
787 | 817 |
788 /// Call instruction (bl/blx). Arguments should have already been pushed. | 818 /// Call instruction (bl/blx). Arguments should have already been pushed. |
789 /// Technically bl and the register form of blx can be predicated, but we'll | 819 /// Technically bl and the register form of blx can be predicated, but we'll |
790 /// leave that out until needed. | 820 /// leave that out until needed. |
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972 // Declare partial template specializations of emit() methods that | 1002 // Declare partial template specializations of emit() methods that |
973 // already have default implementations. Without this, there is the | 1003 // already have default implementations. Without this, there is the |
974 // possibility of ODR violations and link errors. | 1004 // possibility of ODR violations and link errors. |
975 | 1005 |
976 template <> void InstARM32Movw::emit(const Cfg *Func) const; | 1006 template <> void InstARM32Movw::emit(const Cfg *Func) const; |
977 template <> void InstARM32Movt::emit(const Cfg *Func) const; | 1007 template <> void InstARM32Movt::emit(const Cfg *Func) const; |
978 | 1008 |
979 } // end of namespace Ice | 1009 } // end of namespace Ice |
980 | 1010 |
981 #endif // SUBZERO_SRC_ICEINSTARM32_H | 1011 #endif // SUBZERO_SRC_ICEINSTARM32_H |
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