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| 1 //===- subzero/src/IceClFlags.cpp - Command line flags and parsing --------===// | 1 //===- subzero/src/IceClFlags.cpp - Command line flags and parsing --------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 138 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), | 138 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), |
| 139 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), | 139 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), |
| 140 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), | 140 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), |
| 141 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), | 141 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), |
| 142 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), | 142 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), |
| 143 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), | 143 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), |
| 144 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), | 144 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), |
| 145 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"), | 145 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"), |
| 146 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)"), | 146 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)"), |
| 147 clEnumValEnd)); | 147 clEnumValEnd)); |
| 148 |
| 149 cl::opt<uint32_t> TestStackExtra( |
| 150 "test-stack-extra", |
| 151 cl::desc( |
| 152 "Extra amount of stack to add to the frame in bytes (for testing)."), |
| 153 cl::init(0)); |
| 154 |
| 148 cl::opt<Ice::TargetInstructionSet> TargetInstructionSet( | 155 cl::opt<Ice::TargetInstructionSet> TargetInstructionSet( |
| 149 "mattr", cl::desc("Target architecture attributes"), | 156 "mattr", cl::desc("Target architecture attributes"), |
| 150 cl::init(Ice::BaseInstructionSet), | 157 cl::init(Ice::BaseInstructionSet), |
| 151 cl::values(clEnumValN(Ice::BaseInstructionSet, "base", | 158 cl::values(clEnumValN(Ice::BaseInstructionSet, "base", |
| 152 "Target chooses baseline instruction set (default)"), | 159 "Target chooses baseline instruction set (default)"), |
| 153 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2", | 160 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2", |
| 154 "Enable X86 SSE2 instructions"), | 161 "Enable X86 SSE2 instructions"), |
| 155 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1", | 162 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1", |
| 156 "Enable X86 SSE 4.1 instructions"), | 163 "Enable X86 SSE 4.1 instructions"), |
| 157 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon", | 164 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon", |
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| 349 OutFlags.UseSandboxing = false; | 356 OutFlags.UseSandboxing = false; |
| 350 // Enum and integer fields. | 357 // Enum and integer fields. |
| 351 OutFlags.Opt = Opt_m1; | 358 OutFlags.Opt = Opt_m1; |
| 352 OutFlags.OutFileType = FT_Iasm; | 359 OutFlags.OutFileType = FT_Iasm; |
| 353 OutFlags.RandomMaxNopsPerInstruction = 0; | 360 OutFlags.RandomMaxNopsPerInstruction = 0; |
| 354 OutFlags.RandomNopProbabilityAsPercentage = 0; | 361 OutFlags.RandomNopProbabilityAsPercentage = 0; |
| 355 OutFlags.RandomizeAndPoolImmediatesOption = RPI_None; | 362 OutFlags.RandomizeAndPoolImmediatesOption = RPI_None; |
| 356 OutFlags.RandomizeAndPoolImmediatesThreshold = 0xffff; | 363 OutFlags.RandomizeAndPoolImmediatesThreshold = 0xffff; |
| 357 OutFlags.ReorderFunctionsWindowSize = 8; | 364 OutFlags.ReorderFunctionsWindowSize = 8; |
| 358 OutFlags.TArch = TargetArch_NUM; | 365 OutFlags.TArch = TargetArch_NUM; |
| 366 OutFlags.TestStackExtra = 0; |
| 359 OutFlags.VMask = IceV_None; | 367 OutFlags.VMask = IceV_None; |
| 360 // IceString fields. | 368 // IceString fields. |
| 361 OutFlags.DefaultFunctionPrefix = ""; | 369 OutFlags.DefaultFunctionPrefix = ""; |
| 362 OutFlags.DefaultGlobalPrefix = ""; | 370 OutFlags.DefaultGlobalPrefix = ""; |
| 363 OutFlags.TestPrefix = ""; | 371 OutFlags.TestPrefix = ""; |
| 364 OutFlags.TimingFocusOn = ""; | 372 OutFlags.TimingFocusOn = ""; |
| 365 OutFlags.TranslateOnly = ""; | 373 OutFlags.TranslateOnly = ""; |
| 366 OutFlags.VerboseFocusOn = ""; | 374 OutFlags.VerboseFocusOn = ""; |
| 367 // size_t and 64-bit fields. | 375 // size_t and 64-bit fields. |
| 368 OutFlags.NumTranslationThreads = 0; | 376 OutFlags.NumTranslationThreads = 0; |
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| 405 OutFlags.setPhiEdgeSplit(::EnablePhiEdgeSplit); | 413 OutFlags.setPhiEdgeSplit(::EnablePhiEdgeSplit); |
| 406 } | 414 } |
| 407 OutFlags.setRandomSeed(::RandomSeed); | 415 OutFlags.setRandomSeed(::RandomSeed); |
| 408 OutFlags.setShouldDoNopInsertion(::ShouldDoNopInsertion); | 416 OutFlags.setShouldDoNopInsertion(::ShouldDoNopInsertion); |
| 409 OutFlags.setShouldRandomizeRegAlloc(::RandomizeRegisterAllocation); | 417 OutFlags.setShouldRandomizeRegAlloc(::RandomizeRegisterAllocation); |
| 410 OutFlags.setSkipUnimplemented(::SkipUnimplemented); | 418 OutFlags.setSkipUnimplemented(::SkipUnimplemented); |
| 411 OutFlags.setSubzeroTimingEnabled(::SubzeroTimingEnabled); | 419 OutFlags.setSubzeroTimingEnabled(::SubzeroTimingEnabled); |
| 412 OutFlags.setTargetArch(::TargetArch); | 420 OutFlags.setTargetArch(::TargetArch); |
| 413 OutFlags.setTargetInstructionSet(::TargetInstructionSet); | 421 OutFlags.setTargetInstructionSet(::TargetInstructionSet); |
| 414 OutFlags.setTestPrefix(::TestPrefix); | 422 OutFlags.setTestPrefix(::TestPrefix); |
| 423 OutFlags.setTestStackExtra(::TestStackExtra); |
| 415 OutFlags.setTimeEachFunction(::TimeEachFunction); | 424 OutFlags.setTimeEachFunction(::TimeEachFunction); |
| 416 OutFlags.setTimingFocusOn(::TimingFocusOn); | 425 OutFlags.setTimingFocusOn(::TimingFocusOn); |
| 417 OutFlags.setTranslateOnly(::TranslateOnly); | 426 OutFlags.setTranslateOnly(::TranslateOnly); |
| 418 OutFlags.setUseAdvancedSwitchLowering(::UseAdvancedSwitchLowering); | 427 OutFlags.setUseAdvancedSwitchLowering(::UseAdvancedSwitchLowering); |
| 419 OutFlags.setUseSandboxing(::UseSandboxing); | 428 OutFlags.setUseSandboxing(::UseSandboxing); |
| 420 OutFlags.setVerboseFocusOn(::VerboseFocusOn); | 429 OutFlags.setVerboseFocusOn(::VerboseFocusOn); |
| 421 OutFlags.setOutFileType(::OutFileType); | 430 OutFlags.setOutFileType(::OutFileType); |
| 422 OutFlags.setMaxNopsPerInstruction(::MaxNopsPerInstruction); | 431 OutFlags.setMaxNopsPerInstruction(::MaxNopsPerInstruction); |
| 423 OutFlags.setNopProbabilityAsPercentage(::NopProbabilityAsPercentage); | 432 OutFlags.setNopProbabilityAsPercentage(::NopProbabilityAsPercentage); |
| 424 OutFlags.setVerbose(VMask); | 433 OutFlags.setVerbose(VMask); |
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| 446 OutFlagsExtra.setGenerateBuildAtts(GenerateBuildAtts); | 455 OutFlagsExtra.setGenerateBuildAtts(GenerateBuildAtts); |
| 447 OutFlagsExtra.setLLVMVerboseErrors(LLVMVerboseErrors); | 456 OutFlagsExtra.setLLVMVerboseErrors(LLVMVerboseErrors); |
| 448 OutFlagsExtra.setAppName(AppName); | 457 OutFlagsExtra.setAppName(AppName); |
| 449 OutFlagsExtra.setInputFileFormat(InputFileFormat); | 458 OutFlagsExtra.setInputFileFormat(InputFileFormat); |
| 450 OutFlagsExtra.setIRFilename(IRFilename); | 459 OutFlagsExtra.setIRFilename(IRFilename); |
| 451 OutFlagsExtra.setLogFilename(LogFilename); | 460 OutFlagsExtra.setLogFilename(LogFilename); |
| 452 OutFlagsExtra.setOutputFilename(OutputFilename); | 461 OutFlagsExtra.setOutputFilename(OutputFilename); |
| 453 } | 462 } |
| 454 | 463 |
| 455 } // end of namespace Ice | 464 } // end of namespace Ice |
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