| Index: src/mips/macro-assembler-mips.cc
|
| diff --git a/src/mips/macro-assembler-mips.cc b/src/mips/macro-assembler-mips.cc
|
| index 1829522a13b10054af9484596d6acd6f0739c4c5..62d42fda88ad77450b68117f7aa987d25bb1b862 100644
|
| --- a/src/mips/macro-assembler-mips.cc
|
| +++ b/src/mips/macro-assembler-mips.cc
|
| @@ -853,7 +853,7 @@ void MacroAssembler::MultiPopReversed(RegList regs) {
|
|
|
|
|
| void MacroAssembler::MultiPushFPU(RegList regs) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| int16_t num_to_push = NumberOfBitsSet(regs);
|
| int16_t stack_offset = num_to_push * kDoubleSize;
|
|
|
| @@ -868,7 +868,7 @@ void MacroAssembler::MultiPushFPU(RegList regs) {
|
|
|
|
|
| void MacroAssembler::MultiPushReversedFPU(RegList regs) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| int16_t num_to_push = NumberOfBitsSet(regs);
|
| int16_t stack_offset = num_to_push * kDoubleSize;
|
|
|
| @@ -883,7 +883,7 @@ void MacroAssembler::MultiPushReversedFPU(RegList regs) {
|
|
|
|
|
| void MacroAssembler::MultiPopFPU(RegList regs) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| int16_t stack_offset = 0;
|
|
|
| for (int16_t i = 0; i < kNumRegisters; i++) {
|
| @@ -897,7 +897,7 @@ void MacroAssembler::MultiPopFPU(RegList regs) {
|
|
|
|
|
| void MacroAssembler::MultiPopReversedFPU(RegList regs) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| int16_t stack_offset = 0;
|
|
|
| for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
|
| @@ -1165,7 +1165,7 @@ void MacroAssembler::BranchF(Label* target,
|
|
|
|
|
| void MacroAssembler::Move(FPURegister dst, double imm) {
|
| - ASSERT(CpuFeatures::IsEnabled(FPU));
|
| + ASSERT(IsEnabled(FPU));
|
| static const DoubleRepresentation minus_zero(-0.0);
|
| static const DoubleRepresentation zero(0.0);
|
| DoubleRepresentation value(imm);
|
| @@ -1345,7 +1345,7 @@ void MacroAssembler::ConvertToInt32(Register source,
|
| }
|
| bind(&right_exponent);
|
| if (CpuFeatures::IsSupported(FPU)) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| // MIPS FPU instructions implementing double precision to integer
|
| // conversion using round to zero. Since the FP value was qualified
|
| // above, the resulting integer should be a legal int32.
|
| @@ -1406,7 +1406,7 @@ void MacroAssembler::EmitFPUTruncate(FPURoundingMode rounding_mode,
|
| ASSERT(!except_flag.is(scratch));
|
|
|
| ASSERT(CpuFeatures::IsSupported(FPU));
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| Label done;
|
|
|
| // Clear the except flag (0 = no exception)
|
| @@ -1548,7 +1548,7 @@ void MacroAssembler::EmitECMATruncate(Register result,
|
| Register scratch,
|
| Register scratch2,
|
| Register scratch3) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| ASSERT(!scratch2.is(result));
|
| ASSERT(!scratch3.is(result));
|
| ASSERT(!scratch3.is(scratch2));
|
| @@ -3484,7 +3484,7 @@ void MacroAssembler::StoreNumberToDoubleElements(Register value_reg,
|
| scratch4,
|
| f2);
|
| if (destination == FloatingPointHelper::kFPURegisters) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| sdc1(f0, MemOperand(scratch1, 0));
|
| } else {
|
| sw(mantissa_reg, MemOperand(scratch1, 0));
|
| @@ -3577,7 +3577,7 @@ void MacroAssembler::CheckMap(Register obj,
|
|
|
|
|
| void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| if (IsMipsSoftFloatABI) {
|
| Move(dst, v0, v1);
|
| } else {
|
| @@ -3587,7 +3587,7 @@ void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) {
|
|
|
|
|
| void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| if (!IsMipsSoftFloatABI) {
|
| Move(f12, dreg);
|
| } else {
|
| @@ -3598,7 +3598,7 @@ void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) {
|
|
|
| void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1,
|
| DoubleRegister dreg2) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| if (!IsMipsSoftFloatABI) {
|
| if (dreg2.is(f12)) {
|
| ASSERT(!dreg1.is(f14));
|
| @@ -3617,7 +3617,7 @@ void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1,
|
|
|
| void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg,
|
| Register reg) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| if (!IsMipsSoftFloatABI) {
|
| Move(f12, dreg);
|
| Move(a2, reg);
|
| @@ -4632,7 +4632,7 @@ void MacroAssembler::EnterExitFrame(bool save_doubles,
|
|
|
| const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
|
| if (save_doubles) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| // The stack must be allign to 0 modulo 8 for stores with sdc1.
|
| ASSERT(kDoubleSize == frame_alignment);
|
| if (frame_alignment > 0) {
|
| @@ -4670,7 +4670,7 @@ void MacroAssembler::LeaveExitFrame(bool save_doubles,
|
| bool do_return) {
|
| // Optionally restore all double registers.
|
| if (save_doubles) {
|
| - CpuFeatures::Scope scope(FPU);
|
| + CpuFeatureScope scope(this, FPU);
|
| // Remember: we only need to restore every 2nd double FPU value.
|
| lw(t8, MemOperand(fp, ExitFrameConstants::kSPOffset));
|
| for (int i = 0; i < FPURegister::kMaxNumRegisters; i+=2) {
|
|
|