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Unified Diff: src/mips/code-stubs-mips.h

Issue 12391055: Cleaned up CpuFeature scope handling. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: ARM and MIPS support Created 7 years, 10 months ago
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« src/ia32/assembler-ia32.cc ('K') | « src/mips/assembler-mips.cc ('k') | src/mips/code-stubs-mips.cc » ('j') | no next file with comments »
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Index: src/mips/code-stubs-mips.h
diff --git a/src/mips/code-stubs-mips.h b/src/mips/code-stubs-mips.h
index 764791619fba91794278135024cf4a18588086ab..b2ff6143b51ea19d186ec03b51b21a213a71ce5f 100644
--- a/src/mips/code-stubs-mips.h
+++ b/src/mips/code-stubs-mips.h
@@ -484,7 +484,7 @@ class RecordWriteStub: public PlatformCodeStub {
void SaveCallerSaveRegisters(MacroAssembler* masm, SaveFPRegsMode mode) {
masm->MultiPush((kJSCallerSaved | ra.bit()) & ~scratch1_.bit());
if (mode == kSaveFPRegs) {
- CpuFeatures::Scope scope(FPU);
+ CpuFeatureScope scope(masm, FPU);
masm->MultiPushFPU(kCallerSavedFPU);
}
}
@@ -492,7 +492,7 @@ class RecordWriteStub: public PlatformCodeStub {
inline void RestoreCallerSaveRegisters(MacroAssembler*masm,
SaveFPRegsMode mode) {
if (mode == kSaveFPRegs) {
- CpuFeatures::Scope scope(FPU);
+ CpuFeatureScope scope(masm, FPU);
masm->MultiPopFPU(kCallerSavedFPU);
}
masm->MultiPop((kJSCallerSaved | ra.bit()) & ~scratch1_.bit());
« src/ia32/assembler-ia32.cc ('K') | « src/mips/assembler-mips.cc ('k') | src/mips/code-stubs-mips.cc » ('j') | no next file with comments »

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