Index: src/mips/code-stubs-mips.cc |
diff --git a/src/mips/code-stubs-mips.cc b/src/mips/code-stubs-mips.cc |
index b60bd295eb51e7c9a71e6556932f64350b8b70b0..91203c6b65ad7dd0ff0fc5164b7d8398faaaf955 100644 |
--- a/src/mips/code-stubs-mips.cc |
+++ b/src/mips/code-stubs-mips.cc |
@@ -614,7 +614,7 @@ void FloatingPointHelper::LoadSmis(MacroAssembler* masm, |
Register scratch1, |
Register scratch2) { |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ sra(scratch1, a0, kSmiTagSize); |
__ mtc1(scratch1, f14); |
__ cvt_d_w(f14, f14); |
@@ -665,7 +665,7 @@ void FloatingPointHelper::LoadNumber(MacroAssembler* masm, |
// Handle loading a double from a heap number. |
if (CpuFeatures::IsSupported(FPU) && |
destination == kFPURegisters) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Load the double from tagged HeapNumber to double register. |
// ARM uses a workaround here because of the unaligned HeapNumber |
@@ -684,7 +684,7 @@ void FloatingPointHelper::LoadNumber(MacroAssembler* masm, |
// Handle loading a double from a smi. |
__ bind(&is_smi); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Convert smi to double using FPU instructions. |
__ mtc1(scratch1, dst); |
__ cvt_d_w(dst, dst); |
@@ -760,7 +760,7 @@ void FloatingPointHelper::ConvertIntToDouble(MacroAssembler* masm, |
Label done; |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ mtc1(int_scratch, single_scratch); |
__ cvt_d_w(double_dst, single_scratch); |
if (destination == kCoreRegisters) { |
@@ -862,7 +862,7 @@ void FloatingPointHelper::LoadNumberAsInt32Double(MacroAssembler* masm, |
// Load the number. |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Load the double value. |
__ ldc1(double_dst, FieldMemOperand(object, HeapNumber::kValueOffset)); |
@@ -959,7 +959,7 @@ void FloatingPointHelper::LoadNumberAsInt32(MacroAssembler* masm, |
// Object is a heap number. |
// Convert the floating point value to a 32-bit integer. |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Load the double value. |
__ ldc1(double_scratch0, FieldMemOperand(object, HeapNumber::kValueOffset)); |
@@ -1097,7 +1097,7 @@ void FloatingPointHelper::CallCCodeForDoubleOperation( |
__ push(ra); |
__ PrepareCallCFunction(4, scratch); // Two doubles are 4 arguments. |
if (!IsMipsSoftFloatABI) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// We are not using MIPS FPU instructions, and parameters for the runtime |
// function call are prepaired in a0-a3 registers, but function we are |
// calling is compiled with hard-float flag and expecting hard float ABI |
@@ -1113,7 +1113,7 @@ void FloatingPointHelper::CallCCodeForDoubleOperation( |
} |
// Store answer in the overwritable heap number. |
if (!IsMipsSoftFloatABI) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Double returned in register f0. |
__ sdc1(f0, FieldMemOperand(heap_number_result, HeapNumber::kValueOffset)); |
} else { |
@@ -1337,7 +1337,7 @@ static void EmitSmiNonsmiComparison(MacroAssembler* masm, |
// Rhs is a smi, lhs is a number. |
// Convert smi rhs to double. |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ sra(at, rhs, kSmiTagSize); |
__ mtc1(at, f14); |
__ cvt_d_w(f14, f14); |
@@ -1376,7 +1376,7 @@ static void EmitSmiNonsmiComparison(MacroAssembler* masm, |
// Lhs is a smi, rhs is a number. |
// Convert smi lhs to double. |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ sra(at, lhs, kSmiTagSize); |
__ mtc1(at, f12); |
__ cvt_d_w(f12, f12); |
@@ -1404,7 +1404,7 @@ static void EmitSmiNonsmiComparison(MacroAssembler* masm, |
void EmitNanCheck(MacroAssembler* masm, Condition cc) { |
bool exp_first = (HeapNumber::kExponentOffset == HeapNumber::kValueOffset); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Lhs and rhs are already loaded to f12 and f14 register pairs. |
__ Move(t0, t1, f14); |
__ Move(t2, t3, f12); |
@@ -1471,7 +1471,7 @@ static void EmitTwoNonNanDoubleComparison(MacroAssembler* masm, Condition cc) { |
// Exception: 0 and -0. |
bool exp_first = (HeapNumber::kExponentOffset == HeapNumber::kValueOffset); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Lhs and rhs are already loaded to f12 and f14 register pairs. |
__ Move(t0, t1, f14); |
__ Move(t2, t3, f12); |
@@ -1527,7 +1527,7 @@ static void EmitTwoNonNanDoubleComparison(MacroAssembler* masm, Condition cc) { |
__ pop(ra); // Because this function returns int, result is in v0. |
__ Ret(); |
} else { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
Label equal, less_than; |
__ BranchF(&equal, NULL, eq, f12, f14); |
__ BranchF(&less_than, NULL, lt, f12, f14); |
@@ -1603,7 +1603,7 @@ static void EmitCheckForTwoHeapNumbers(MacroAssembler* masm, |
// Both are heap numbers. Load them up then jump to the code we have |
// for that. |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ ldc1(f12, FieldMemOperand(lhs, HeapNumber::kValueOffset)); |
__ ldc1(f14, FieldMemOperand(rhs, HeapNumber::kValueOffset)); |
} else { |
@@ -1698,7 +1698,7 @@ void NumberToStringStub::GenerateLookupNumberStringCache(MacroAssembler* masm, |
if (!object_is_smi) { |
__ JumpIfSmi(object, &is_smi); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ CheckMap(object, |
scratch1, |
Heap::kHeapNumberMapRootIndex, |
@@ -1851,7 +1851,7 @@ void ICCompareStub::GenerateGeneric(MacroAssembler* masm) { |
Isolate* isolate = masm->isolate(); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
Label nan; |
__ li(t0, Operand(LESS)); |
__ li(t1, Operand(GREATER)); |
@@ -1986,7 +1986,7 @@ void ICCompareStub::GenerateGeneric(MacroAssembler* masm) { |
// it, too: zero for false, and a non-zero value for true. |
void ToBooleanStub::Generate(MacroAssembler* masm) { |
// This stub uses FPU instructions. |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
Label patch; |
const Register map = t5.is(tos_) ? t3 : t5; |
@@ -2101,7 +2101,7 @@ void StoreBufferOverflowStub::Generate(MacroAssembler* masm) { |
// restore them. |
__ MultiPush(kJSCallerSaved | ra.bit()); |
if (save_doubles_ == kSaveFPRegs) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ MultiPushFPU(kCallerSavedFPU); |
} |
const int argument_count = 1; |
@@ -2115,7 +2115,7 @@ void StoreBufferOverflowStub::Generate(MacroAssembler* masm) { |
ExternalReference::store_buffer_overflow_function(masm->isolate()), |
argument_count); |
if (save_doubles_ == kSaveFPRegs) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ MultiPopFPU(kCallerSavedFPU); |
} |
@@ -2348,7 +2348,7 @@ void UnaryOpStub::GenerateHeapNumberCodeBitNot( |
if (CpuFeatures::IsSupported(FPU)) { |
// Convert the int32 in a1 to the heap number in v0. a2 is corrupted. |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ mtc1(a1, f0); |
__ cvt_d_w(f0, f0); |
__ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset)); |
@@ -2693,7 +2693,7 @@ void BinaryOpStub_GenerateFPOperation(MacroAssembler* masm, |
// Using FPU registers: |
// f12: Left value. |
// f14: Right value. |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
switch (op) { |
case Token::ADD: |
__ add_d(f10, f12, f14); |
@@ -2825,7 +2825,7 @@ void BinaryOpStub_GenerateFPOperation(MacroAssembler* masm, |
if (CpuFeatures::IsSupported(FPU)) { |
// Convert the int32 in a2 to the heap number in a0. As |
// mentioned above SHR needs to always produce a positive result. |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
__ mtc1(a2, f0); |
if (op == Token::SHR) { |
__ Cvt_d_uw(f0, f0, f22); |
@@ -3020,7 +3020,7 @@ void BinaryOpStub::GenerateInt32Stub(MacroAssembler* masm) { |
&transition); |
if (destination == FloatingPointHelper::kFPURegisters) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
Label return_heap_number; |
switch (op_) { |
case Token::ADD: |
@@ -3234,7 +3234,7 @@ void BinaryOpStub::GenerateInt32Stub(MacroAssembler* masm) { |
mode_); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
if (op_ != Token::SHR) { |
// Convert the result to a floating point value. |
@@ -3438,7 +3438,7 @@ void TranscendentalCacheStub::Generate(MacroAssembler* masm) { |
const bool tagged = (argument_type_ == TAGGED); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
if (tagged) { |
// Argument is a number and is on stack and in a0. |
@@ -3548,7 +3548,7 @@ void TranscendentalCacheStub::Generate(MacroAssembler* masm) { |
1); |
} else { |
ASSERT(CpuFeatures::IsSupported(FPU)); |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
Label no_update; |
Label skip_cache; |
@@ -3676,7 +3676,7 @@ void InterruptStub::Generate(MacroAssembler* masm) { |
void MathPowStub::Generate(MacroAssembler* masm) { |
- CpuFeatures::Scope fpu_scope(FPU); |
+ CpuFeatureScope fpu_scope(masm, FPU); |
const Register base = a1; |
const Register exponent = a2; |
const Register heapnumbermap = t1; |
@@ -3919,21 +3919,15 @@ void CodeStub::GenerateFPStubs(Isolate* isolate) { |
// These stubs might already be in the snapshot, detect that and don't |
// regenerate, which would lead to code stub initialization state being messed |
// up. |
- Code* save_doubles_code = NULL; |
- Code* store_buffer_overflow_code = NULL; |
- if (!save_doubles.FindCodeInCache(&save_doubles_code, ISOLATE)) { |
- if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope2(FPU); |
- save_doubles_code = *save_doubles.GetCode(isolate); |
- store_buffer_overflow_code = *stub.GetCode(isolate); |
- } else { |
- save_doubles_code = *save_doubles.GetCode(isolate); |
- store_buffer_overflow_code = *stub.GetCode(isolate); |
- } |
+ Code* save_doubles_code; |
+ if (!save_doubles.FindCodeInCache(&save_doubles_code, isolate)) { |
+ save_doubles_code = *save_doubles.GetCode(isolate); |
save_doubles_code->set_is_pregenerated(true); |
+ |
+ Code* store_buffer_overflow_code = *stub.GetCode(isolate); |
store_buffer_overflow_code->set_is_pregenerated(true); |
} |
- ISOLATE->set_fp_stubs_generated(true); |
+ isolate->set_fp_stubs_generated(true); |
} |
@@ -4189,7 +4183,7 @@ void JSEntryStub::GenerateBody(MacroAssembler* masm, bool is_construct) { |
__ MultiPush(kCalleeSaved | ra.bit()); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Save callee-saved FPU registers. |
__ MultiPushFPU(kCalleeSavedFPU); |
// Set up the reserved register for 0.0. |
@@ -4338,7 +4332,7 @@ void JSEntryStub::GenerateBody(MacroAssembler* masm, bool is_construct) { |
__ addiu(sp, sp, -EntryFrameConstants::kCallerFPOffset); |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Restore callee-saved fpu registers. |
__ MultiPopFPU(kCalleeSavedFPU); |
} |
@@ -7027,7 +7021,7 @@ void ICCompareStub::GenerateNumbers(MacroAssembler* masm) { |
// Inlining the double comparison and falling back to the general compare |
// stub if NaN is involved or FPU is unsupported. |
if (CpuFeatures::IsSupported(FPU)) { |
- CpuFeatures::Scope scope(FPU); |
+ CpuFeatureScope scope(masm, FPU); |
// Load left and right operand. |
Label done, left, left_smi, right_smi; |