Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(4)

Side by Side Diff: src/x64/macro-assembler-x64.cc

Issue 12391055: Cleaned up CpuFeature scope handling. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fixed nits Created 7 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/x64/lithium-codegen-x64.cc ('k') | test/cctest/test-assembler-arm.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 880 matching lines...) Expand 10 before | Expand all | Expand 10 after
891 // store the registers in any particular way, but we do have to store and 891 // store the registers in any particular way, but we do have to store and
892 // restore them. 892 // restore them.
893 for (int i = 0; i < kNumberOfSavedRegs; i++) { 893 for (int i = 0; i < kNumberOfSavedRegs; i++) {
894 Register reg = saved_regs[i]; 894 Register reg = saved_regs[i];
895 if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) { 895 if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) {
896 push(reg); 896 push(reg);
897 } 897 }
898 } 898 }
899 // R12 to r15 are callee save on all platforms. 899 // R12 to r15 are callee save on all platforms.
900 if (fp_mode == kSaveFPRegs) { 900 if (fp_mode == kSaveFPRegs) {
901 CpuFeatures::Scope scope(SSE2); 901 CpuFeatureScope scope(this, SSE2);
902 subq(rsp, Immediate(kDoubleSize * XMMRegister::kMaxNumRegisters)); 902 subq(rsp, Immediate(kDoubleSize * XMMRegister::kMaxNumRegisters));
903 for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) { 903 for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) {
904 XMMRegister reg = XMMRegister::from_code(i); 904 XMMRegister reg = XMMRegister::from_code(i);
905 movsd(Operand(rsp, i * kDoubleSize), reg); 905 movsd(Operand(rsp, i * kDoubleSize), reg);
906 } 906 }
907 } 907 }
908 } 908 }
909 909
910 910
911 void MacroAssembler::PopCallerSaved(SaveFPRegsMode fp_mode, 911 void MacroAssembler::PopCallerSaved(SaveFPRegsMode fp_mode,
912 Register exclusion1, 912 Register exclusion1,
913 Register exclusion2, 913 Register exclusion2,
914 Register exclusion3) { 914 Register exclusion3) {
915 if (fp_mode == kSaveFPRegs) { 915 if (fp_mode == kSaveFPRegs) {
916 CpuFeatures::Scope scope(SSE2); 916 CpuFeatureScope scope(this, SSE2);
917 for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) { 917 for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) {
918 XMMRegister reg = XMMRegister::from_code(i); 918 XMMRegister reg = XMMRegister::from_code(i);
919 movsd(reg, Operand(rsp, i * kDoubleSize)); 919 movsd(reg, Operand(rsp, i * kDoubleSize));
920 } 920 }
921 addq(rsp, Immediate(kDoubleSize * XMMRegister::kMaxNumRegisters)); 921 addq(rsp, Immediate(kDoubleSize * XMMRegister::kMaxNumRegisters));
922 } 922 }
923 for (int i = kNumberOfSavedRegs - 1; i >= 0; i--) { 923 for (int i = kNumberOfSavedRegs - 1; i >= 0; i--) {
924 Register reg = saved_regs[i]; 924 Register reg = saved_regs[i];
925 if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) { 925 if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) {
926 pop(reg); 926 pop(reg);
(...skipping 3724 matching lines...) Expand 10 before | Expand all | Expand 10 after
4651 j(greater, &no_info_available); 4651 j(greater, &no_info_available);
4652 CompareRoot(MemOperand(scratch_reg, -AllocationSiteInfo::kSize), 4652 CompareRoot(MemOperand(scratch_reg, -AllocationSiteInfo::kSize),
4653 Heap::kAllocationSiteInfoMapRootIndex); 4653 Heap::kAllocationSiteInfoMapRootIndex);
4654 bind(&no_info_available); 4654 bind(&no_info_available);
4655 } 4655 }
4656 4656
4657 4657
4658 } } // namespace v8::internal 4658 } } // namespace v8::internal
4659 4659
4660 #endif // V8_TARGET_ARCH_X64 4660 #endif // V8_TARGET_ARCH_X64
OLDNEW
« no previous file with comments | « src/x64/lithium-codegen-x64.cc ('k') | test/cctest/test-assembler-arm.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698