Adds vstm, vldm to ARM simulator, assembler, disassembler

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 
 #include "vm/stub_code.h"
 
 namespace dart {
 
 // TODO(regis): Enable this flag after PrintStopMessage stub is implemented.
 DEFINE_FLAG(bool, print_stop_message, false, "Print stop message.");
 
 
 // Instruction encoding bits.
 enum {
   H   = 1 << 5,   // halfword (or byte)
   L   = 1 << 20,  // load (or store)
   S   = 1 << 20,  // set condition code (or leave unchanged)
   W   = 1 << 21,  // writeback base register (or leave unchanged)
   A   = 1 << 21,  // accumulate in multiply instruction (or not)
   B   = 1 << 22,  // unsigned byte (or word)
+  D   = 1 << 22,  // high/lo bit of start of s/d register range
   N   = 1 << 22,  // long (or short)
   U   = 1 << 23,  // positive (or negative) offset/index
   P   = 1 << 24,  // offset/pre-indexed addressing (or post-indexed addressing)
   I   = 1 << 25,  // immediate shifter operand (or not)
 
   B0 = 1,
   B1 = 1 << 1,
   B2 = 1 << 2,
   B3 = 1 << 3,
   B4 = 1 << 4,
@@ skipping 661 matching lines @@
   ASSERT(dd != kNoDRegister);
   ASSERT(cond != kNoCondition);
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
                      B27 | B26 | B24 |
                      ((static_cast<int32_t>(dd) >> 4)*B22) |
                      ((static_cast<int32_t>(dd) & 0xf)*B12) |
                      B11 | B9 | B8 | ad.vencoding();
   Emit(encoding);
 }
 
+void Assembler::EmitMultiVSMemOp(Condition cond,
+                                BlockAddressMode am,
+                                bool load,
+                                Register base,
+                                SRegister start,
+                                uint32_t count) {
+  ASSERT(base != kNoRegister);
+  ASSERT(cond != kNoCondition);
+  ASSERT(start != kNoSRegister);
+  ASSERT(static_cast<int32_t>(start) + count <= kNumberOfSRegisters);
+
+  int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
+                     B27 | B26 | B11 | B9 |
+                     am |
+                     (load ? L : 0) |
+                     (static_cast<int32_t>(base) << kRnShift) |
+                     ((static_cast<int32_t>(start) & 0x1) ? D : 0) |
+                     ((static_cast<int32_t>(start) >> 1) << 12) |
+                     count;
+  Emit(encoding);
+}
+
+
+void Assembler::EmitMultiVDMemOp(Condition cond,
+                                BlockAddressMode am,
+                                bool load,
+                                Register base,
+                                DRegister start,
+                                int32_t count) {
+  ASSERT(base != kNoRegister);
+  ASSERT(cond != kNoCondition);
+  ASSERT(start != kNoDRegister);
+  ASSERT(static_cast<int32_t>(start) + count <= kNumberOfDRegisters);
+
+  int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
+                     B27 | B26 | B11 | B9 | B8 |
+                     am |
+                     (load ? L : 0) |
+                     (static_cast<int32_t>(base) << kRnShift) |
+                     ((static_cast<int32_t>(start) & 0x10) ? D : 0) |
+                     ((static_cast<int32_t>(start) & 0xf) << 12) |
+                     (count << 1);
+  Emit(encoding);
+}
+
+
+void Assembler::vldms(BlockAddressMode am, Register base,
+                      SRegister first, SRegister last, Condition cond) {
+  ASSERT((am == IA) || (am == IA_W) || (am == DB_W));
+  ASSERT(last > first);
+  EmitMultiVSMemOp(cond, am, true, base, first, last - first + 1);
+}
+
+
+void Assembler::vstms(BlockAddressMode am, Register base,
+                      SRegister first, SRegister last, Condition cond) {
+  ASSERT((am == IA) || (am == IA_W) || (am == DB_W));
+  ASSERT(last > first);
+  EmitMultiVSMemOp(cond, am, false, base, first, last - first + 1);
+}
+
+
+void Assembler::vldmd(BlockAddressMode am, Register base,
+                      DRegister first, DRegister last, Condition cond) {
+  ASSERT((am == IA) || (am == IA_W) || (am == DB_W));
+  ASSERT(last > first);
+  EmitMultiVDMemOp(cond, am, true, base, first, last - first + 1);
+}
+
+
+void Assembler::vstmd(BlockAddressMode am, Register base,
+                      DRegister first, DRegister last, Condition cond) {
+  ASSERT((am == IA) || (am == IA_W) || (am == DB_W));
+  ASSERT(last > first);
+  EmitMultiVDMemOp(cond, am, false, base, first, last - first + 1);
+}
+
 
 void Assembler::EmitVFPsss(Condition cond, int32_t opcode,
                            SRegister sd, SRegister sn, SRegister sm) {
   ASSERT(sd != kNoSRegister);
   ASSERT(sn != kNoSRegister);
   ASSERT(sm != kNoSRegister);
   ASSERT(cond != kNoCondition);
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
                      B27 | B26 | B25 | B11 | B9 | opcode |
                      ((static_cast<int32_t>(sd) & 1)*B22) |
@@ skipping 938 matching lines @@
   // Do not reuse an existing entry, since each reference may be patched
   // independently.
   object_pool_.Add(smi);
   return object_pool_.Length() - 1;
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM