Adds mrc instruction to arm simulator, assembler, disassembler.

runtime/vm/simulator_arm.cc

Index: runtime/vm/simulator_arm.cc
===================================================================
--- runtime/vm/simulator_arm.cc	(revision 19404)
+++ runtime/vm/simulator_arm.cc	(working copy)
@@ -24,6 +24,7 @@
 
 DEFINE_FLAG(bool, trace_sim, false, "Trace simulator execution.");
 DEFINE_FLAG(int, stop_sim_at, 0, "Address to stop simulator at.");
+DEFINE_FLAG(bool, sim_has_int_div, false, "Simulator implements sdiv and udiv");

[regis, 2013/03/04 21:54:52]

not necessary.

 
 
 // This macro provides a platform independent use of sscanf. The reason for
@@ -2585,6 +2586,14 @@
         UNIMPLEMENTED();
       }
     }
+  } else if (instr->IsMrcIdIsar0()) {
+    // mrc of ID_ISAR0
+    Register rd = instr->RdField();
+    if (FLAG_sim_has_int_div) {

[regis, 2013/03/04 21:54:52]

Test CPUFeatures instead.

+      set_register(rd, 0x02100010);  // sim has sdiv, udiv, bkpt and clz
+    } else {
+      set_register(rd, 0x00100010);  // simulator has only bkpt and clz
+    }
   } else {
     UNIMPLEMENTED();
   }