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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
| (...skipping 1477 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 1488 } | 1488 } |
| 1489 instr = I | rotate_imm*B8 | immed_8; | 1489 instr = I | rotate_imm*B8 | immed_8; |
| 1490 } else { | 1490 } else { |
| 1491 ASSERT(!src.rs_.is_valid() && src.shift_imm_ == 0); // only rm allowed | 1491 ASSERT(!src.rs_.is_valid() && src.shift_imm_ == 0); // only rm allowed |
| 1492 instr = src.rm_.code(); | 1492 instr = src.rm_.code(); |
| 1493 } | 1493 } |
| 1494 emit(cond | instr | B24 | B21 | fields | 15*B12); | 1494 emit(cond | instr | B24 | B21 | fields | 15*B12); |
| 1495 } | 1495 } |
| 1496 | 1496 |
| 1497 | 1497 |
| 1498 // Preload data instruction | |
| 1499 void Assembler::pld(const MemOperand& src) { | |
|
Sven Panne
2013/02/28 07:36:11
This looks suspiciously like a specialization of a
| |
| 1500 Instr instr = kCondMask | B26 | B | L | kRdMask; | |
| 1501 int am = src.am_; | |
| 1502 ASSERT((am & (P | W)) == P); | |
| 1503 if (!src.rm_.is_valid()) { | |
| 1504 // Immediate offset. | |
| 1505 int offset_12 = src.offset_; | |
| 1506 if (offset_12 < 0) { | |
| 1507 offset_12 = -offset_12; | |
| 1508 am ^= U; | |
| 1509 } | |
| 1510 ASSERT(offset_12 >= 0); // no masking needed | |
| 1511 instr |= offset_12; | |
| 1512 } else { | |
| 1513 // Register offset (shift_imm_ and shift_op_ are 0) or scaled | |
| 1514 // register offset the constructors make sure than both shift_imm_ | |
| 1515 // and shift_op_ are initialized. | |
| 1516 ASSERT(!src.rm_.is(pc)); | |
| 1517 instr |= B25 | src.shift_imm_*B7 | src.shift_op_ | src.rm_.code(); | |
| 1518 } | |
| 1519 emit(instr | am | src.rn_.code()*B16); | |
| 1520 } | |
| 1521 | |
| 1522 | |
| 1498 // Load/Store instructions. | 1523 // Load/Store instructions. |
| 1499 void Assembler::ldr(Register dst, const MemOperand& src, Condition cond) { | 1524 void Assembler::ldr(Register dst, const MemOperand& src, Condition cond) { |
| 1500 if (dst.is(pc)) { | 1525 if (dst.is(pc)) { |
| 1501 positions_recorder()->WriteRecordedPositions(); | 1526 positions_recorder()->WriteRecordedPositions(); |
| 1502 } | 1527 } |
| 1503 addrmod2(cond | B26 | L, dst, src); | 1528 addrmod2(cond | B26 | L, dst, src); |
| 1504 } | 1529 } |
| 1505 | 1530 |
| 1506 | 1531 |
| 1507 void Assembler::str(Register src, const MemOperand& dst, Condition cond) { | 1532 void Assembler::str(Register src, const MemOperand& dst, Condition cond) { |
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| 3026 | 3051 |
| 3027 // Since a constant pool was just emitted, move the check offset forward by | 3052 // Since a constant pool was just emitted, move the check offset forward by |
| 3028 // the standard interval. | 3053 // the standard interval. |
| 3029 next_buffer_check_ = pc_offset() + kCheckPoolInterval; | 3054 next_buffer_check_ = pc_offset() + kCheckPoolInterval; |
| 3030 } | 3055 } |
| 3031 | 3056 |
| 3032 | 3057 |
| 3033 } } // namespace v8::internal | 3058 } } // namespace v8::internal |
| 3034 | 3059 |
| 3035 #endif // V8_TARGET_ARCH_ARM | 3060 #endif // V8_TARGET_ARCH_ARM |
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