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Issue 1234393005: A mechanism to identify/forbid/"rewrite" non-temporal instructions (and other) (Closed) Base URL: https://chromium.googlesource.com/native_client/src/native_client.git@master
Patch Set: Fixing nits Created 5 years, 4 months ago
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1 # Copyright (c) 2012 The Native Client Authors. All rights reserved. 1 # Copyright (c) 2012 The Native Client Authors. All rights reserved.
2 # Use of this source code is governed by a BSD-style license that can be 2 # Use of this source code is governed by a BSD-style license that can be
3 # found in the LICENSE file. 3 # found in the LICENSE file.
4 ################################################################################ 4 ################################################################################
5 # This file describes instructions from AMD64 Architecture Programmer's Manual 5 # This file describes instructions from AMD64 Architecture Programmer's Manual
6 # Volume 3: General-Purpose and System Instruction 6 # Volume 3: General-Purpose and System Instruction
7 # Chapter 3: General-Purpose Instruction Reference 7 # Chapter 3: General-Purpose Instruction Reference
8 ################################################################################ 8 ################################################################################
9 # File format: see def_format.py 9 # File format: see def_format.py
10 ######## ADC ################################################################### 10 ######## ADC ###################################################################
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470 movmskpd Upd Gy, 0x66 0x0f 0x50, CPUFeature_SSE2 470 movmskpd Upd Gy, 0x66 0x0f 0x50, CPUFeature_SSE2
471 ######## MOVMSKPS ############################################################## 471 ######## MOVMSKPS ##############################################################
472 # Textbook definition of "movmskps" as per AMD/Intel manuals looks like this: 472 # Textbook definition of "movmskps" as per AMD/Intel manuals looks like this:
473 # movmskps Ups Gd, 0x0f 0x50, CPUFeature_SSE2 473 # movmskps Ups Gd, 0x0f 0x50, CPUFeature_SSE2
474 # GNU as accepts this description, but objdump decodes last operand as "Gy". 474 # GNU as accepts this description, but objdump decodes last operand as "Gy".
475 # Technically it makes no difference: "movmskps" clears everything except least 475 # Technically it makes no difference: "movmskps" clears everything except least
476 # significant four bits and this operation produces precisely idential output 476 # significant four bits and this operation produces precisely idential output
477 # for "Gy" and "Gd" operands. We use objdump's description. 477 # for "Gy" and "Gd" operands. We use objdump's description.
478 movmskps Ups Gy, 0x0f 0x50, CPUFeature_SSE 478 movmskps Ups Gy, 0x0f 0x50, CPUFeature_SSE
479 ######## MOVNTI ################################################################ 479 ######## MOVNTI ################################################################
480 movnti Gy My, 0x0f 0xc3, CPUFeature_SSE2 480 movnti Gy My, 0x0f 0xc3, CPUFeature_SSE2 nacl-unsupported
481 ######## MOVS/MOVSB/MOVSW/MOVSD/MOVSQ ########################################## 481 ######## MOVS/MOVSB/MOVSW/MOVSD/MOVSQ ##########################################
482 movs X Y, 0xa4, rep nacl-amd64-forbidden 482 movs X Y, 0xa4, rep nacl-amd64-forbidden
483 ######## MOVSX ################################################################# 483 ######## MOVSX #################################################################
484 # Textbook definition of "movsx" as per AMD/Intel manuals looks like this: 484 # Textbook definition of "movsx" as per AMD/Intel manuals looks like this:
485 # movsx Eb Gv, 0x0f 0xbe 485 # movsx Eb Gv, 0x0f 0xbe
486 # movsx Ew Gy, 0x0f 0xbf 486 # movsx Ew Gy, 0x0f 0xbf
487 # Objdump has different names for this instrustion: "movsbw", "movsbl", "movsbq" , 487 # Objdump has different names for this instrustion: "movsbw", "movsbl", "movsbq" ,
488 # "movswl", "movswq" depending on operand size. We describe 32bit versions and 488 # "movswl", "movswq" depending on operand size. We describe 32bit versions and
489 # 64bit version separately. 489 # 64bit version separately.
490 movsbl Eb Gd, 0x0f 0xbe, norexw nacl-amd64-zero-extends 490 movsbl Eb Gd, 0x0f 0xbe, norexw nacl-amd64-zero-extends
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609 # For consistency with the production validators, drop support for this form of 609 # For consistency with the production validators, drop support for this form of
610 # "prefetch" in ia32 mode but support in in amd64 mode. 610 # "prefetch" in ia32 mode but support in in amd64 mode.
611 # Note that the former 32- and 64-bit validators treat "prefetch" inconsistently : 611 # Note that the former 32- and 64-bit validators treat "prefetch" inconsistently :
612 # http://code.google.com/p/nativeclient/issues/detail?id=2977 612 # http://code.google.com/p/nativeclient/issues/detail?id=2977
613 prefetch Mb, 0x0f 0x0d /3, CPUFeature_3DPRFTCH no_memory_access nacl-ia32-forbid den 613 prefetch Mb, 0x0f 0x0d /3, CPUFeature_3DPRFTCH no_memory_access nacl-ia32-forbid den
614 prefetch Mb, 0x0f 0x0d /4, CPUFeature_3DPRFTCH no_memory_access nacl-forbidden 614 prefetch Mb, 0x0f 0x0d /4, CPUFeature_3DPRFTCH no_memory_access nacl-forbidden
615 prefetch Mb, 0x0f 0x0d /5, CPUFeature_3DPRFTCH no_memory_access nacl-forbidden 615 prefetch Mb, 0x0f 0x0d /5, CPUFeature_3DPRFTCH no_memory_access nacl-forbidden
616 prefetch Mb, 0x0f 0x0d /6, CPUFeature_3DPRFTCH no_memory_access nacl-forbidden 616 prefetch Mb, 0x0f 0x0d /6, CPUFeature_3DPRFTCH no_memory_access nacl-forbidden
617 prefetch Mb, 0x0f 0x0d /7, CPUFeature_3DPRFTCH no_memory_access nacl-forbidden 617 prefetch Mb, 0x0f 0x0d /7, CPUFeature_3DPRFTCH no_memory_access nacl-forbidden
618 ######## PREFETCHlevel ######################################################### 618 ######## PREFETCHlevel #########################################################
619 prefetchnta Mb, 0x0f 0x18 /0, CPUFeature_SSE no_memory_access 619 prefetchnta Mb, 0x0f 0x18 /0, CPUFeature_SSE no_memory_access nacl-unsupported
620 prefetcht0 Mb, 0x0f 0x18 /1, CPUFeature_SSE no_memory_access 620 prefetcht0 Mb, 0x0f 0x18 /1, CPUFeature_SSE no_memory_access
621 prefetcht1 Mb, 0x0f 0x18 /2, CPUFeature_SSE no_memory_access 621 prefetcht1 Mb, 0x0f 0x18 /2, CPUFeature_SSE no_memory_access
622 prefetcht2 Mb, 0x0f 0x18 /3, CPUFeature_SSE no_memory_access 622 prefetcht2 Mb, 0x0f 0x18 /3, CPUFeature_SSE no_memory_access
623 # AMD manual claims this opcode is "nop". Intel manual says it's "reserved". 623 # AMD manual claims this opcode is "nop". Intel manual says it's "reserved".
624 # Real silicon accepts it and seemingly doing nothing. 624 # Real silicon accepts it and seemingly doing nothing.
625 "nop/reserved" Mb, 0x0f 0x18 /4, CPUFeature_SSE no_memory_access nacl-forbidden 625 "nop/reserved" Mb, 0x0f 0x18 /4, CPUFeature_SSE no_memory_access nacl-forbidden
626 "nop/reserved" Mb, 0x0f 0x18 /5, CPUFeature_SSE no_memory_access nacl-forbidden 626 "nop/reserved" Mb, 0x0f 0x18 /5, CPUFeature_SSE no_memory_access nacl-forbidden
627 "nop/reserved" Mb, 0x0f 0x18 /6, CPUFeature_SSE no_memory_access nacl-forbidden 627 "nop/reserved" Mb, 0x0f 0x18 /6, CPUFeature_SSE no_memory_access nacl-forbidden
628 "nop/reserved" Mb, 0x0f 0x18 /7, CPUFeature_SSE no_memory_access nacl-forbidden 628 "nop/reserved" Mb, 0x0f 0x18 /7, CPUFeature_SSE no_memory_access nacl-forbidden
629 ######## PUSH ################################################################## 629 ######## PUSH ##################################################################
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828 xchg &G M, 0x86, lock 828 xchg &G M, 0x86, lock
829 ######## XLAT ################################################################## 829 ######## XLAT ##################################################################
830 xlat xb, 0xd7, nacl-forbidden 830 xlat xb, 0xd7, nacl-forbidden
831 ######## XOR ################################################################### 831 ######## XOR ###################################################################
832 xor I a, 0x34, nacl-amd64-zero-extends 832 xor I a, 0x34, nacl-amd64-zero-extends
833 xor I E, 0x80 /6, lock nacl-amd64-zero-extends 833 xor I E, 0x80 /6, lock nacl-amd64-zero-extends
834 xor Ib Ev, 0x83 /6, lock nacl-amd64-zero-extends 834 xor Ib Ev, 0x83 /6, lock nacl-amd64-zero-extends
835 xor G E, 0x30, lock nacl-amd64-zero-extends 835 xor G E, 0x30, lock nacl-amd64-zero-extends
836 xor E G, 0x32, nacl-amd64-zero-extends 836 xor E G, 0x32, nacl-amd64-zero-extends
837 ################################################################################ 837 ################################################################################
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