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Side by Side Diff: tests_lit/llvm2ice_tests/rmw.ll

Issue 1233903002: Factor out legalization of undef, and handle more cases for ARM. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: stuff Created 5 years, 5 months ago
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1 ; This tests Read-Modify-Write (RMW) detection and lowering at the O2 1 ; This tests Read-Modify-Write (RMW) detection and lowering at the O2
2 ; optimization level. 2 ; optimization level.
3 3
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
5 ; RUN: --target x8632 -i %s --args -O2 \ 5 ; RUN: --target x8632 -i %s --args -O2 \
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s
7 7
8 define internal void @rmw_add_i32_var(i32 %addr_arg, i32 %var) { 8 define internal void @rmw_add_i32_var(i32 %addr_arg, i32 %var) {
9 entry: 9 entry:
10 %addr = inttoptr i32 %addr_arg to i32* 10 %addr = inttoptr i32 %addr_arg to i32*
(...skipping 112 matching lines...) Expand 10 before | Expand all | Expand 10 after
123 define internal i32 @no_rmw_sub_i32_var(i32 %addr_arg, i32 %var) { 123 define internal i32 @no_rmw_sub_i32_var(i32 %addr_arg, i32 %var) {
124 entry: 124 entry:
125 %addr = inttoptr i32 %addr_arg to i32* 125 %addr = inttoptr i32 %addr_arg to i32*
126 %val = load i32, i32* %addr, align 1 126 %val = load i32, i32* %addr, align 1
127 %rmw = sub i32 %var, %val 127 %rmw = sub i32 %var, %val
128 store i32 %rmw, i32* %addr, align 1 128 store i32 %rmw, i32* %addr, align 1
129 ret i32 %rmw 129 ret i32 %rmw
130 } 130 }
131 ; CHECK-LABEL: no_rmw_sub_i32_var 131 ; CHECK-LABEL: no_rmw_sub_i32_var
132 ; CHECK: sub e{{ax|bx|cx|dx|bp|di|si}},DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}] 132 ; CHECK: sub e{{ax|bx|cx|dx|bp|di|si}},DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}]
133
134 define internal void @rmw_add_i64_undef(i32 %addr_arg) {
135 entry:
136 %addr = inttoptr i32 %addr_arg to i64*
137 %val = load i64, i64* %addr, align 1
138 %rmw = add i64 %val, undef
139 store i64 %rmw, i64* %addr, align 1
140 ret void
141 }
142 ; CHECK-LABEL: rmw_add_i64_undef
143 ; CHECK: add DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],0x0
144 ; CHECK: adc DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}+0x4],0x0
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