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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef VM_CONSTANTS_ARM_H_ | 5 #ifndef VM_CONSTANTS_ARM_H_ |
| 6 #define VM_CONSTANTS_ARM_H_ | 6 #define VM_CONSTANTS_ARM_H_ |
| 7 | 7 |
| 8 namespace dart { | 8 namespace dart { |
| 9 | 9 |
| 10 // We support both VFPv3-D16 and VFPv3-D32 profiles, but currently only one at | 10 // We support both VFPv3-D16 and VFPv3-D32 profiles, but currently only one at |
| 11 // a time. | 11 // a time. |
| 12 #define VFPv3_D16 | 12 #define VFPv3_D16 |
| 13 #if defined(VFPv3_D16) == defined(VFPv3_D32) | 13 #if defined(VFPv3_D16) == defined(VFPv3_D32) |
| 14 #error "Exactly one of VFPv3_D16 or VFPv3_D32 can be defined at a time." | 14 #error "Exactly one of VFPv3_D16 or VFPv3_D32 can be defined at a time." |
| 15 #endif | 15 #endif |
| 16 | 16 |
| 17 | 17 |
| 18 enum Register { | 18 enum Register { |
| 19 kFirstFreeCpuRegister = 0, |
| 19 R0 = 0, | 20 R0 = 0, |
| 20 R1 = 1, | 21 R1 = 1, |
| 21 R2 = 2, | 22 R2 = 2, |
| 22 R3 = 3, | 23 R3 = 3, |
| 23 R4 = 4, | 24 R4 = 4, |
| 24 R5 = 5, | 25 R5 = 5, |
| 25 R6 = 6, | 26 R6 = 6, |
| 26 R7 = 7, | 27 R7 = 7, |
| 27 R8 = 8, | 28 R8 = 8, |
| 29 kLastFreeCpuRegister = 8, |
| 28 R9 = 9, | 30 R9 = 9, |
| 29 R10 = 10, | 31 R10 = 10, |
| 30 R11 = 11, | 32 R11 = 11, |
| 31 R12 = 12, | 33 R12 = 12, |
| 32 R13 = 13, | 34 R13 = 13, |
| 33 R14 = 14, | 35 R14 = 14, |
| 34 R15 = 15, | 36 R15 = 15, |
| 35 FP = 11, | 37 FP = 11, |
| 36 IP = 12, | 38 IP = 12, |
| 37 SP = 13, | 39 SP = 13, |
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| 125 }; | 127 }; |
| 126 | 128 |
| 127 | 129 |
| 128 // Architecture independent aliases. | 130 // Architecture independent aliases. |
| 129 typedef DRegister FpuRegister; | 131 typedef DRegister FpuRegister; |
| 130 const FpuRegister FpuTMP = D0; | 132 const FpuRegister FpuTMP = D0; |
| 131 const int kNumberOfFpuRegisters = kNumberOfDRegisters; | 133 const int kNumberOfFpuRegisters = kNumberOfDRegisters; |
| 132 | 134 |
| 133 | 135 |
| 134 // Register aliases. | 136 // Register aliases. |
| 135 const Register TMP = kNoRegister; // No scratch register used by assembler. | 137 const Register TMP = IP; // Used as scratch register by assembler. |
| 136 const Register CTX = R9; // Caches current context in generated code. | 138 const Register CTX = R9; // Caches current context in generated code. |
| 137 const Register PP = R10; // Caches object pool pointer in generated code. | 139 const Register PP = R10; // Caches object pool pointer in generated code. |
| 138 const Register SPREG = SP; | 140 const Register SPREG = SP; // Stack pointer register. |
| 139 const Register FPREG = FP; | 141 const Register FPREG = FP; // Frame pointer register. |
| 140 | 142 |
| 141 | 143 |
| 142 // Exception object is passed in this register to the catch handlers when an | 144 // Exception object is passed in this register to the catch handlers when an |
| 143 // exception is thrown. | 145 // exception is thrown. |
| 144 const Register kExceptionObjectReg = R0; // Unimplemented. | 146 const Register kExceptionObjectReg = R0; // Unimplemented. |
| 145 | 147 |
| 146 | 148 |
| 147 // List of registers used in load/store multiple. | 149 // List of registers used in load/store multiple. |
| 148 typedef uint16_t RegList; | 150 typedef uint16_t RegList; |
| 149 const RegList kAllCoreRegistersList = 0xFFFF; | 151 const RegList kAllCpuRegistersList = 0xFFFF; |
| 150 | 152 |
| 151 | 153 |
| 152 // C++ ABI call registers | 154 // C++ ABI call registers |
| 153 const int kAbiRegisterCount = 4; | 155 const RegList kAbiArgumentRegs = (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3); |
| 154 const Register kAbiRegisters[kAbiRegisterCount] = { R0, R1, R2, R3 }; | 156 const RegList kAbiPreservedRegs = (1 << R4) | (1 << R5) | (1 << R6) | |
| 155 const RegList kAbiRegisterList = (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3); | 157 (1 << R7) | (1 << R8) | (1 << R9) | (1 << 10); |
| 158 const int kAbiPreservedRegCount = 7; |
| 156 | 159 |
| 157 | 160 |
| 158 // Values for the condition field as defined in section A3.2. | 161 // Values for the condition field as defined in section A3.2. |
| 159 enum Condition { | 162 enum Condition { |
| 160 kNoCondition = -1, | 163 kNoCondition = -1, |
| 161 EQ = 0, // equal | 164 EQ = 0, // equal |
| 162 NE = 1, // not equal | 165 NE = 1, // not equal |
| 163 CS = 2, // carry set/unsigned higher or same | 166 CS = 2, // carry set/unsigned higher or same |
| 164 CC = 3, // carry clear/unsigned lower | 167 CC = 3, // carry clear/unsigned lower |
| 165 MI = 4, // minus/negative | 168 MI = 4, // minus/negative |
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| 424 ASSERT(Bits(26, 2) == 0); // Type 0 or 1. | 427 ASSERT(Bits(26, 2) == 0); // Type 0 or 1. |
| 425 return ((Bit(25) == 0) && ((Bits(20, 5) & 0x19) == 0x10) && (Bit(7) == 0)); | 428 return ((Bit(25) == 0) && ((Bits(20, 5) & 0x19) == 0x10) && (Bit(7) == 0)); |
| 426 } | 429 } |
| 427 inline bool IsMultiplyOrSyncPrimitive() const { | 430 inline bool IsMultiplyOrSyncPrimitive() const { |
| 428 ASSERT(Bits(26, 2) == 0); // Type 0 or 1. | 431 ASSERT(Bits(26, 2) == 0); // Type 0 or 1. |
| 429 return ((Bit(25) == 0) && (Bits(4, 4) == 9)); | 432 return ((Bit(25) == 0) && (Bits(4, 4) == 9)); |
| 430 } | 433 } |
| 431 | 434 |
| 432 // Test for Supervisor Call instruction. | 435 // Test for Supervisor Call instruction. |
| 433 inline bool IsSvc() const { | 436 inline bool IsSvc() const { |
| 434 return ((InstructionBits() & 0xff000000) == 0xef000000); | 437 return ((InstructionBits() & 0x0f000000) == 0x0f000000); |
| 435 } | 438 } |
| 436 | 439 |
| 437 // Test for Breakpoint instruction. | 440 // Test for Breakpoint instruction. |
| 438 inline bool IsBkpt() const { | 441 inline bool IsBkpt() const { |
| 439 return ((InstructionBits() & 0xfff000f0) == 0xe1200070); | 442 return ((InstructionBits() & 0x0ff000f0) == 0x01200070); |
| 440 } | 443 } |
| 441 | 444 |
| 442 // VFP register fields. | 445 // VFP register fields. |
| 443 inline SRegister SnField() const { | 446 inline SRegister SnField() const { |
| 444 return static_cast<SRegister>((Bits(kRnShift, kRnBits) << 1) + Bit(7)); | 447 return static_cast<SRegister>((Bits(kRnShift, kRnBits) << 1) + Bit(7)); |
| 445 } | 448 } |
| 446 inline SRegister SdField() const { | 449 inline SRegister SdField() const { |
| 447 return static_cast<SRegister>((Bits(kRdShift, kRdBits) << 1) + Bit(22)); | 450 return static_cast<SRegister>((Bits(kRdShift, kRdBits) << 1) + Bit(22)); |
| 448 } | 451 } |
| 449 inline SRegister SmField() const { | 452 inline SRegister SmField() const { |
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| 500 Instr* Next() { return this + kInstrSize; } | 503 Instr* Next() { return this + kInstrSize; } |
| 501 | 504 |
| 502 private: | 505 private: |
| 503 DISALLOW_ALLOCATION(); | 506 DISALLOW_ALLOCATION(); |
| 504 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); | 507 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); |
| 505 }; | 508 }; |
| 506 | 509 |
| 507 } // namespace dart | 510 } // namespace dart |
| 508 | 511 |
| 509 #endif // VM_CONSTANTS_ARM_H_ | 512 #endif // VM_CONSTANTS_ARM_H_ |
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