Compile and simulate first dart function on arm generated from ast.

runtime/vm/assembler_arm.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_ARM_H_
 #define VM_ASSEMBLER_ARM_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_arm.h directly; use assembler.h instead.
 #endif
@@ skipping 395 matching lines @@
            RegList regs, Condition cond = AL);
 
   void ldrex(Register rd, Register rn, Condition cond = AL);
   void strex(Register rd, Register rt, Register rn, Condition cond = AL);
 
   // Miscellaneous instructions.
   void clrex();
   void nop(Condition cond = AL);
 
   // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0.
-  void bkpt(uint16_t imm16);
-  void svc(uint32_t imm24);
+  void bkpt(uint16_t imm16, Condition cond = AL);
+  void svc(uint32_t imm24, Condition cond = AL);
 
   // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles).
   void vmovsr(SRegister sn, Register rt, Condition cond = AL);
   void vmovrs(Register rt, SRegister sn, Condition cond = AL);
   void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL);
   void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL);
   void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL);
   void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL);
   void vmovs(SRegister sd, SRegister sm, Condition cond = AL);
   void vmovd(DRegister dd, DRegister dm, Condition cond = AL);
@@ skipping 40 matching lines @@
 
   void vcmps(SRegister sd, SRegister sm, Condition cond = AL);
   void vcmpd(DRegister dd, DRegister dm, Condition cond = AL);
   void vcmpsz(SRegister sd, Condition cond = AL);
   void vcmpdz(DRegister dd, Condition cond = AL);
   void vmstat(Condition cond = AL);  // VMRS APSR_nzcv, FPSCR
 
   // Branch instructions.
   void b(Label* label, Condition cond = AL);
   void bl(Label* label, Condition cond = AL);
+  void bx(Register rm, Condition cond = AL);
   void blx(Register rm, Condition cond = AL);
 
   // Macros.
   // Branch to an entry address. Call sequence is never patched.
-  void Branch(const ExternalLabel* label);
+  void Branch(const ExternalLabel* label, Condition cond = AL);
 
   // Branch and link to an entry address. Call sequence is never patched.
   void BranchLink(const ExternalLabel* label);
 
   // Branch and link to an entry address. Call sequence can be patched.
   void BranchLinkPatchable(const ExternalLabel* label);
 
   // Branch and link to entry after storing return address at ad.
   // Call sequence is never patched.
   void BranchLinkStore(const ExternalLabel* label, Address ad);
 
   // Branch and link to [base + offset]. Call sequence is never patched.
   void BranchLinkOffset(Register base, int offset);
 
-  // Add signed constant value to rd. May clobber IP.
-  void AddConstant(Register rd, int32_t value, Condition cond = AL);
-  void AddConstant(Register rd, Register rn, int32_t value,
-                   Condition cond = AL);
-  void AddConstantSetFlags(Register rd, Register rn, int32_t value,
-                           Condition cond = AL);
-  void AddConstantWithCarry(Register rd, Register rn, int32_t value,
+  // Add signed immediate value to rd. May clobber IP.
+  void AddImmediate(Register rd, int32_t value, Condition cond = AL);
+  void AddImmediate(Register rd, Register rn, int32_t value,
+                    Condition cond = AL);
+  void AddImmediateSetFlags(Register rd, Register rn, int32_t value,
                             Condition cond = AL);
+  void AddImmediateWithCarry(Register rd, Register rn, int32_t value,
+                             Condition cond = AL);
+
+  // Compare rn with signed immediate value. May clobber IP.
+  void CompareImmediate(Register rn, int32_t value, Condition cond = AL);
 
   // Load and Store. May clobber IP.
   void LoadImmediate(Register rd, int32_t value, Condition cond = AL);
   void LoadSImmediate(SRegister sd, float value, Condition cond = AL);
   void LoadDImmediate(DRegister dd, double value,
                       Register scratch, Condition cond = AL);
   void MarkExceptionHandler(Label* label);
   void LoadObject(Register rd, const Object& object);
   void LoadFromOffset(LoadOperandType type,
                       Register reg,
@@ skipping 31 matching lines @@
   void Mov(Register rd, Register rm, Condition cond = AL);
 
   // Convenience shift instructions. Use mov instruction with shifter operand
   // for variants setting the status flags or using a register shift count.
   void Lsl(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
   void Lsr(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
   void Asr(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
   void Ror(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
   void Rrx(Register rd, Register rm, Condition cond = AL);
 
+  void SmiTag(Register reg, Condition cond = AL) {
+    Lsl(reg, reg, kSmiTagSize, cond);
+  }
+
+  void SmiUntag(Register reg, Condition cond = AL) {
+    Asr(reg, reg, kSmiTagSize, cond);
+  }
+
+  // Function frame setup and tear down.
+  void EnterFrame(RegList regs, intptr_t frame_space);
+  void LeaveFrame(RegList regs);
+  void Ret();
+  void ReserveAlignedFrameSpace(intptr_t frame_space);
+
   // Emit data (e.g encoded instruction or immediate) in instruction stream.
   void Emit(int32_t value);
 
  private:
   AssemblerBuffer buffer_;  // Contains position independent code.
   GrowableObjectArray& object_pool_;  // Objects and patchable jump targets.
   int32_t prologue_offset_;
 
   int32_t AddObject(const Object& obj);
   int32_t AddExternalLabel(const ExternalLabel* label);
@@ skipping 94 matching lines @@
     return *reg1 - *reg2;
   }
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM_H_