Compile and simulate first dart function on arm generated from ast.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 
 #include "vm/stub_code.h"
@@ skipping 974 matching lines @@
 void Assembler::vmstat(Condition cond) {  // VMRS APSR_nzcv, FPSCR
   ASSERT(cond != kNoCondition);
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
                      B27 | B26 | B25 | B23 | B22 | B21 | B20 | B16 |
                      (static_cast<int32_t>(PC)*B12) |
                      B11 | B9 | B4;
   Emit(encoding);
 }
 
 
-void Assembler::svc(uint32_t imm24) {
+void Assembler::svc(uint32_t imm24, Condition cond) {
+  ASSERT(cond != kNoCondition);
   ASSERT(imm24 < (1 << 24));
-  int32_t encoding = (AL << kConditionShift) | B27 | B26 | B25 | B24 | imm24;
+  int32_t encoding = (cond << kConditionShift) | B27 | B26 | B25 | B24 | imm24;
   Emit(encoding);
 }
 
 
-void Assembler::bkpt(uint16_t imm16) {
-  int32_t encoding = (AL << kConditionShift) | B24 | B21 |
+void Assembler::bkpt(uint16_t imm16, Condition cond) {
+  ASSERT(cond != kNoCondition);
+  int32_t encoding = (cond << kConditionShift) | B24 | B21 |
                      ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf);
   Emit(encoding);
 }
 
 
 void Assembler::b(Label* label, Condition cond) {
   EmitBranch(cond, label, false);
 }
 
 
 void Assembler::bl(Label* label, Condition cond) {
   EmitBranch(cond, label, true);
 }
 
 
+void Assembler::bx(Register rm, Condition cond) {
+  ASSERT(rm != kNoRegister);
+  ASSERT(cond != kNoCondition);
+  int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
+                     B24 | B21 | (0xfff << 8) | B4 |
+                     (static_cast<int32_t>(rm) << kRmShift);
+  Emit(encoding);
+}
+
+
 void Assembler::blx(Register rm, Condition cond) {
   ASSERT(rm != kNoRegister);
   ASSERT(cond != kNoCondition);
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
                      B24 | B21 | (0xfff << 8) | B5 | B4 |
                      (static_cast<int32_t>(rm) << kRmShift);
   Emit(encoding);
 }
 
 
 void Assembler::MarkExceptionHandler(Label* label) {
   EmitType01(AL, 1, TST, 1, PC, R0, ShifterOperand(0));
   Label l;
   b(&l);
   EmitBranch(AL, label, false);
   Bind(&l);
 }
 
 
 void Assembler::LoadObject(Register rd, const Object& object) {
-  // TODO(regis): If the object is never relocated (null, true, false, ...),
-  // load as immediate.
+  if (object.IsNull() ||
+      object.IsSmi() ||
+      (object.raw() == Bool::True().raw()) ||
+      (object.raw() == Bool::False().raw())) {
+    // This object is never relocated; do not use object pool.
+    LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw()));
+    return;
+  }
   const int32_t offset =
       Array::data_offset() + 4*AddObject(object) - kHeapObjectTag;
   if (Address::CanHoldLoadOffset(kLoadWord, offset)) {
     ldr(rd, Address(PP, offset));
   } else {
     int32_t offset12_hi = offset & ~kOffset12Mask;  // signed
     uint32_t offset12_lo = offset & kOffset12Mask;  // unsigned
-    AddConstant(rd, PP, offset12_hi);
+    AddImmediate(rd, PP, offset12_hi);
     ldr(rd, Address(rd, offset12_lo));
   }
 }
 
 
 void Assembler::Bind(Label* label) {
   ASSERT(!label->IsBound());
   int bound_pc = buffer_.Size();
   while (label->IsLinked()) {
     int32_t position = label->Position();
@@ skipping 99 matching lines @@
   ASSERT(shift_imm != 0);  // Use Rrx instruction.
   mov(rd, ShifterOperand(rm, ROR, shift_imm), cond);
 }
 
 
 void Assembler::Rrx(Register rd, Register rm, Condition cond) {
   mov(rd, ShifterOperand(rm, ROR, 0), cond);
 }
 
 
-void Assembler::Branch(const ExternalLabel* label) {
-  LoadImmediate(IP, label->address());  // Target address is never patched.
-  mov(PC, ShifterOperand(IP));
+void Assembler::Branch(const ExternalLabel* label, Condition cond) {
+  LoadImmediate(IP, label->address(), cond);  // Address is never patched.
+  mov(PC, ShifterOperand(IP), cond);
 }
 
 
 void Assembler::BranchLink(const ExternalLabel* label) {
   LoadImmediate(IP, label->address());  // Target address is never patched.
   blx(IP);  // Use blx instruction so that the return branch prediction works.
 }
 
 
 void Assembler::BranchLinkPatchable(const ExternalLabel* label) {
   // Make sure that class CallPattern is able to patch the label referred
   // to by this code sequence.
   // For added code robustness, use 'blx lr' in a patchable sequence and
   // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors).
   const int32_t offset =
       Array::data_offset() + 4*AddExternalLabel(label) - kHeapObjectTag;
   if (Address::CanHoldLoadOffset(kLoadWord, offset)) {
     ldr(LR, Address(PP, offset));
   } else {
     int32_t offset12_hi = offset & ~kOffset12Mask;  // signed
     uint32_t offset12_lo = offset & kOffset12Mask;  // unsigned
-    // Inline a simplified version of AddConstant(LR, CP, offset12_hi).
+    // Inline a simplified version of AddImmediate(LR, CP, offset12_hi).
     ShifterOperand shifter_op;
     if (ShifterOperand::CanHold(offset12_hi, &shifter_op)) {
       add(LR, PP, shifter_op);
     } else {
       movw(LR, Utils::Low16Bits(offset12_hi));
       const uint16_t value_high = Utils::High16Bits(offset12_hi);
       if (value_high != 0) {
         movt(LR, value_high);
       }
       add(LR, PP, ShifterOperand(LR));
@@ skipping 204 matching lines @@
     LoadImmediate(IP, offset, cond);
     add(IP, IP, ShifterOperand(base), cond);
     base = IP;
     offset = 0;
   }
   ASSERT(Address::CanHoldStoreOffset(kStoreDWord, offset));
   vstrd(reg, Address(base, offset), cond);
 }
 
 
-void Assembler::AddConstant(Register rd, int32_t value, Condition cond) {
-  AddConstant(rd, rd, value, cond);
+void Assembler::AddImmediate(Register rd, int32_t value, Condition cond) {
+  AddImmediate(rd, rd, value, cond);
 }
 
 
-void Assembler::AddConstant(Register rd, Register rn, int32_t value,
+void Assembler::AddImmediate(Register rd, Register rn, int32_t value,
                             Condition cond) {
   if (value == 0) {
     if (rd != rn) {
       mov(rd, ShifterOperand(rn), cond);
     }
     return;
   }
   // We prefer to select the shorter code sequence rather than selecting add for
   // positive values and sub for negatives ones, which would slightly improve
   // the readability of generated code for some constants.
@@ skipping 15 matching lines @@
       uint16_t value_high = Utils::High16Bits(value);
       if (value_high != 0) {
         movt(IP, value_high, cond);
       }
       add(rd, rn, ShifterOperand(IP), cond);
     }
   }
 }
 
 
-void Assembler::AddConstantSetFlags(Register rd, Register rn, int32_t value,
+void Assembler::AddImmediateSetFlags(Register rd, Register rn, int32_t value,
                                     Condition cond) {
   ShifterOperand shifter_op;
   if (ShifterOperand::CanHold(value, &shifter_op)) {
     adds(rd, rn, shifter_op, cond);
   } else if (ShifterOperand::CanHold(-value, &shifter_op)) {
     subs(rd, rn, shifter_op, cond);
   } else {
     ASSERT(rn != IP);
     if (ShifterOperand::CanHold(~value, &shifter_op)) {
       mvn(IP, shifter_op, cond);
       adds(rd, rn, ShifterOperand(IP), cond);
     } else if (ShifterOperand::CanHold(~(-value), &shifter_op)) {
       mvn(IP, shifter_op, cond);
       subs(rd, rn, ShifterOperand(IP), cond);
     } else {
       movw(IP, Utils::Low16Bits(value), cond);
       uint16_t value_high = Utils::High16Bits(value);
       if (value_high != 0) {
         movt(IP, value_high, cond);
       }
       adds(rd, rn, ShifterOperand(IP), cond);
     }
   }
 }
 
 
-void Assembler::AddConstantWithCarry(Register rd, Register rn, int32_t value,
+void Assembler::AddImmediateWithCarry(Register rd, Register rn, int32_t value,
                                      Condition cond) {
   ShifterOperand shifter_op;
   if (ShifterOperand::CanHold(value, &shifter_op)) {
     adc(rd, rn, shifter_op, cond);
   } else if (ShifterOperand::CanHold(-value - 1, &shifter_op)) {
     sbc(rd, rn, shifter_op, cond);
   } else {
     ASSERT(rn != IP);
     if (ShifterOperand::CanHold(~value, &shifter_op)) {
       mvn(IP, shifter_op, cond);
       adc(rd, rn, ShifterOperand(IP), cond);
     } else if (ShifterOperand::CanHold(~(-value - 1), &shifter_op)) {
       mvn(IP, shifter_op, cond);
       sbc(rd, rn, ShifterOperand(IP), cond);
     } else {
       movw(IP, Utils::Low16Bits(value), cond);
       uint16_t value_high = Utils::High16Bits(value);
       if (value_high != 0) {
         movt(IP, value_high, cond);
       }
       adc(rd, rn, ShifterOperand(IP), cond);
     }
   }
 }
 
 
+void Assembler::CompareImmediate(Register rn, int32_t value, Condition cond) {
+  ShifterOperand shifter_op;
+  if (ShifterOperand::CanHold(value, &shifter_op)) {
+    cmp(rn, shifter_op, cond);
+  } else {
+    ASSERT(rn != IP);
+    LoadImmediate(IP, cond);
+    cmp(rn, ShifterOperand(IP), cond);
+  }
+}
+
+
+static int NumRegsBelowFP(RegList regs) {
+  int count = 0;
+  for (int i = 0; i < FP; i++) {
+    if ((regs & (1 << i)) != 0) {
+      count++;
+    }
+  }
+  return count;
+}
+
+
+void Assembler::EnterFrame(RegList regs, intptr_t frame_size) {
+  if (prologue_offset_ == -1) {
+    prologue_offset_ = CodeSize();
+  }
+  PushList(regs);
+  if ((regs & (1 << FP)) != 0) {
+    // Set FP to the saved previous FP.
+    add(FP, SP, ShifterOperand(4 * NumRegsBelowFP(regs)));
+  }
+  AddImmediate(SP, -frame_size);
+}
+
+
+void Assembler::LeaveFrame(RegList regs) {
+  ASSERT((regs & (1 << PC)) == 0);  // Must not pop PC.
+  if ((regs & (1 << FP)) != 0) {
+    // Use FP to set SP.
+    sub(SP, FP, ShifterOperand(4 * NumRegsBelowFP(regs)));
+  }
+  PopList(regs);
+}
+
+
+void Assembler::Ret() {
+  bx(LR);
+}
+
+
+void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
+  // Reserve space for arguments and align frame before entering
+  // the C++ world.
+  AddImmediate(SP, -frame_space);
+  if (OS::ActivationFrameAlignment() > 0) {
+    and_(SP, SP, ShifterOperand(~(OS::ActivationFrameAlignment() - 1)));
+  }
+}
+
+
 void Assembler::Stop(const char* message) {
   if (FLAG_print_stop_message) {
     PushList((1 << R0) | (1 << IP) | (1 << LR));  // Preserve R0, IP, LR.
     LoadImmediate(R0, reinterpret_cast<int32_t>(message));
     // PrintStopMessage() preserves all registers.
     BranchLink(&StubCode::PrintStopMessageLabel());  // Passing message in R0.
     PopList((1 << R0) | (1 << IP) | (1 << LR));  // Restore R0, IP, LR.
   }
   // Emit the message address before the svc instruction, so that we can
   // 'unstop' and continue execution in the simulator or jump to the next
@@ skipping 54 matching lines @@
   // Do not reuse an existing entry, since each reference may be patched
   // independently.
   object_pool_.Add(smi);
   return object_pool_.Length() - 1;
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM