| Index: src/arm/assembler-arm.cc
|
| diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
|
| index da1ab68a76d0ae1bf47d35444df3f51524ad314a..7560dfe566801320c19c8c7765bd5632b11f0a9d 100644
|
| --- a/src/arm/assembler-arm.cc
|
| +++ b/src/arm/assembler-arm.cc
|
| @@ -1298,7 +1298,7 @@ void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) {
|
| }
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|
|
|
|
| -int Assembler::branch_offset(Label* L, bool jump_elimination_allowed) {
|
| +int Assembler::branch_offset(Label* L) {
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| int target_pos;
|
| if (L->is_bound()) {
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| target_pos = L->pos();
|
| @@ -1367,6 +1367,24 @@ void Assembler::bx(Register target, Condition cond) { // v5 and above, plus v4t
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| }
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|
|
|
|
| +void Assembler::b(Label* L, Condition cond) {
|
| + CheckBuffer();
|
| + b(branch_offset(L), cond);
|
| +}
|
| +
|
| +
|
| +void Assembler::bl(Label* L, Condition cond) {
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| + CheckBuffer();
|
| + bl(branch_offset(L), cond);
|
| +}
|
| +
|
| +
|
| +void Assembler::blx(Label* L) {
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| + CheckBuffer();
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| + blx(branch_offset(L));
|
| +}
|
| +
|
| +
|
| // Data-processing instructions.
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|
|
| void Assembler::and_(Register dst, Register src1, const Operand& src2,
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| @@ -3771,10 +3789,7 @@ void Assembler::CheckConstPool(bool force_emit, bool require_jump) {
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| RecordConstPool(size);
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|
|
| // Emit jump over constant pool if necessary.
|
| - Label after_pool;
|
| - if (require_jump) {
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| - b(&after_pool);
|
| - }
|
| + if (require_jump) b(size - kPcLoadDelta);
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|
|
| // Put down constant pool marker "Undefined instruction".
|
| // The data size helps disassembly know what to print.
|
| @@ -3881,10 +3896,6 @@ void Assembler::CheckConstPool(bool force_emit, bool require_jump) {
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| first_const_pool_64_use_ = -1;
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|
|
| RecordComment("]");
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| -
|
| - if (after_pool.is_linked()) {
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| - bind(&after_pool);
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| - }
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| }
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|
|
| // Since a constant pool was just emitted, move the check offset forward by
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|
|