OLD | NEW |
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
(...skipping 171 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
182 | 182 |
183 #undef REGISTER | 183 #undef REGISTER |
184 | 184 |
185 | 185 |
186 int ToNumber(Register reg); | 186 int ToNumber(Register reg); |
187 | 187 |
188 Register ToRegister(int num); | 188 Register ToRegister(int num); |
189 | 189 |
190 // Coprocessor register. | 190 // Coprocessor register. |
191 struct FPURegister { | 191 struct FPURegister { |
192 static const int kNumRegisters = v8::internal::kNumFPURegisters; | 192 static const int kMaxNumRegisters = v8::internal::kNumFPURegisters; |
193 | 193 |
194 // TODO(plind): Warning, inconsistent numbering here. kNumFPURegisters refers | 194 // TODO(plind): Warning, inconsistent numbering here. kNumFPURegisters refers |
195 // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to | 195 // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to |
196 // number of Double regs (64-bit regs, or FPU-reg-pairs). | 196 // number of Double regs (64-bit regs, or FPU-reg-pairs). |
197 | 197 |
198 // A few double registers are reserved: one as a scratch register and one to | 198 // A few double registers are reserved: one as a scratch register and one to |
199 // hold 0.0. | 199 // hold 0.0. |
200 // f28: 0.0 | 200 // f28: 0.0 |
201 // f30: scratch register. | 201 // f30: scratch register. |
202 static const int kNumReservedRegisters = 2; | 202 static const int kNumReservedRegisters = 2; |
203 static const int kMaxNumAllocatableRegisters = kNumRegisters / 2 - | 203 static const int kMaxNumAllocatableRegisters = kMaxNumRegisters / 2 - |
204 kNumReservedRegisters; | 204 kNumReservedRegisters; |
205 | 205 |
206 inline static int NumRegisters(); | 206 inline static int NumRegisters(); |
207 inline static int NumAllocatableRegisters(); | 207 inline static int NumAllocatableRegisters(); |
208 inline static int ToAllocationIndex(FPURegister reg); | 208 inline static int ToAllocationIndex(FPURegister reg); |
209 static const char* AllocationIndexToString(int index); | 209 static const char* AllocationIndexToString(int index); |
210 | 210 |
211 static FPURegister FromAllocationIndex(int index) { | 211 static FPURegister FromAllocationIndex(int index) { |
212 ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters); | 212 ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters); |
213 return from_code(index * 2); | 213 return from_code(index * 2); |
214 } | 214 } |
215 | 215 |
216 static FPURegister from_code(int code) { | 216 static FPURegister from_code(int code) { |
217 FPURegister r = { code }; | 217 FPURegister r = { code }; |
218 return r; | 218 return r; |
219 } | 219 } |
220 | 220 |
221 bool is_valid() const { return 0 <= code_ && code_ < kNumFPURegisters ; } | 221 bool is_valid() const { return 0 <= code_ && code_ < kMaxNumRegisters ; } |
222 bool is(FPURegister creg) const { return code_ == creg.code_; } | 222 bool is(FPURegister creg) const { return code_ == creg.code_; } |
223 FPURegister low() const { | 223 FPURegister low() const { |
224 // Find low reg of a Double-reg pair, which is the reg itself. | 224 // Find low reg of a Double-reg pair, which is the reg itself. |
225 ASSERT(code_ % 2 == 0); // Specified Double reg must be even. | 225 ASSERT(code_ % 2 == 0); // Specified Double reg must be even. |
226 FPURegister reg; | 226 FPURegister reg; |
227 reg.code_ = code_; | 227 reg.code_ = code_; |
228 ASSERT(reg.is_valid()); | 228 ASSERT(reg.is_valid()); |
229 return reg; | 229 return reg; |
230 } | 230 } |
231 FPURegister high() const { | 231 FPURegister high() const { |
(...skipping 1041 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1273 class EnsureSpace BASE_EMBEDDED { | 1273 class EnsureSpace BASE_EMBEDDED { |
1274 public: | 1274 public: |
1275 explicit EnsureSpace(Assembler* assembler) { | 1275 explicit EnsureSpace(Assembler* assembler) { |
1276 assembler->CheckBuffer(); | 1276 assembler->CheckBuffer(); |
1277 } | 1277 } |
1278 }; | 1278 }; |
1279 | 1279 |
1280 } } // namespace v8::internal | 1280 } } // namespace v8::internal |
1281 | 1281 |
1282 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1282 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
OLD | NEW |