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Side by Side Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 1232313007: MIPS: Fix missing falthru handling for some branch cases in TF. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Clean the code. Created 5 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 #include "src/compiler/code-generator-impl.h" 6 #include "src/compiler/code-generator-impl.h"
7 #include "src/compiler/gap-resolver.h" 7 #include "src/compiler/gap-resolver.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/mips/macro-assembler-mips.h" 9 #include "src/mips/macro-assembler-mips.h"
10 #include "src/scopes.h" 10 #include "src/scopes.h"
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976 // registers to compare pseudo-op are not modified before this branch op, as 976 // registers to compare pseudo-op are not modified before this branch op, as
977 // they are tested here. 977 // they are tested here.
978 978
979 if (instr->arch_opcode() == kMips64Tst) { 979 if (instr->arch_opcode() == kMips64Tst) {
980 cc = FlagsConditionToConditionTst(branch->condition); 980 cc = FlagsConditionToConditionTst(branch->condition);
981 __ And(at, i.InputRegister(0), i.InputOperand(1)); 981 __ And(at, i.InputRegister(0), i.InputOperand(1));
982 __ Branch(tlabel, cc, at, Operand(zero_reg)); 982 __ Branch(tlabel, cc, at, Operand(zero_reg));
983 } else if (instr->arch_opcode() == kMips64Dadd || 983 } else if (instr->arch_opcode() == kMips64Dadd ||
984 instr->arch_opcode() == kMips64Dsub) { 984 instr->arch_opcode() == kMips64Dsub) {
985 cc = FlagsConditionToConditionOvf(branch->condition); 985 cc = FlagsConditionToConditionOvf(branch->condition);
986
987 __ dsra32(kScratchReg, i.OutputRegister(), 0); 986 __ dsra32(kScratchReg, i.OutputRegister(), 0);
988 __ sra(at, i.OutputRegister(), 31); 987 __ sra(at, i.OutputRegister(), 31);
989 __ Branch(tlabel, cc, at, Operand(kScratchReg)); 988 __ Branch(tlabel, cc, at, Operand(kScratchReg));
990 } else if (instr->arch_opcode() == kMips64Cmp) { 989 } else if (instr->arch_opcode() == kMips64Cmp) {
991 cc = FlagsConditionToConditionCmp(branch->condition); 990 cc = FlagsConditionToConditionCmp(branch->condition);
992 __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1)); 991 __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
993
994 if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
995 } else if (instr->arch_opcode() == kMips64CmpS) { 992 } else if (instr->arch_opcode() == kMips64CmpS) {
996 if (!convertCondition(branch->condition, cc)) { 993 if (!convertCondition(branch->condition, cc)) {
997 UNSUPPORTED_COND(kMips64CmpS, branch->condition); 994 UNSUPPORTED_COND(kMips64CmpS, branch->condition);
998 } 995 }
999 __ BranchF32(tlabel, NULL, cc, i.InputSingleRegister(0), 996 __ BranchF32(tlabel, NULL, cc, i.InputSingleRegister(0),
1000 i.InputSingleRegister(1)); 997 i.InputSingleRegister(1));
1001
1002 if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
1003
1004 } else if (instr->arch_opcode() == kMips64CmpD) { 998 } else if (instr->arch_opcode() == kMips64CmpD) {
1005 if (!convertCondition(branch->condition, cc)) { 999 if (!convertCondition(branch->condition, cc)) {
1006 UNSUPPORTED_COND(kMips64CmpD, branch->condition); 1000 UNSUPPORTED_COND(kMips64CmpD, branch->condition);
1007 } 1001 }
1008 __ BranchF64(tlabel, NULL, cc, i.InputDoubleRegister(0), 1002 __ BranchF64(tlabel, NULL, cc, i.InputDoubleRegister(0),
1009 i.InputDoubleRegister(1)); 1003 i.InputDoubleRegister(1));
1010
1011 if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
1012 } else { 1004 } else {
1013 PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n", 1005 PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
1014 instr->arch_opcode()); 1006 instr->arch_opcode());
1015 UNIMPLEMENTED(); 1007 UNIMPLEMENTED();
1016 } 1008 }
1009 if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
1017 } 1010 }
1018 1011
1019 1012
1020 void CodeGenerator::AssembleArchJump(RpoNumber target) { 1013 void CodeGenerator::AssembleArchJump(RpoNumber target) {
1021 if (!IsNextInAssemblyOrder(target)) __ Branch(GetLabel(target)); 1014 if (!IsNextInAssemblyOrder(target)) __ Branch(GetLabel(target));
1022 } 1015 }
1023 1016
1024 1017
1025 // Assembles boolean materializations after an instruction. 1018 // Assembles boolean materializations after an instruction.
1026 void CodeGenerator::AssembleArchBoolean(Instruction* instr, 1019 void CodeGenerator::AssembleArchBoolean(Instruction* instr,
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1456 } 1449 }
1457 } 1450 }
1458 } 1451 }
1459 } 1452 }
1460 1453
1461 #undef __ 1454 #undef __
1462 1455
1463 } // namespace compiler 1456 } // namespace compiler
1464 } // namespace internal 1457 } // namespace internal
1465 } // namespace v8 1458 } // namespace v8
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