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Issue 12321149: Implements shifted offset register addressing mode for arm. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 9
10 #include "vm/stub_code.h" 10 #include "vm/stub_code.h"
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57 // ldrex/strex register field encodings. 57 // ldrex/strex register field encodings.
58 kLdExRnShift = 16, 58 kLdExRnShift = 16,
59 kLdExRtShift = 12, 59 kLdExRtShift = 12,
60 kStrExRnShift = 16, 60 kStrExRnShift = 16,
61 kStrExRdShift = 12, 61 kStrExRdShift = 12,
62 kStrExRtShift = 0, 62 kStrExRtShift = 0,
63 }; 63 };
64 64
65 65
66 uint32_t Address::encoding3() const { 66 uint32_t Address::encoding3() const {
67 ASSERT(kind_ == Immediate);
67 const uint32_t offset_mask = (1 << 12) - 1; 68 const uint32_t offset_mask = (1 << 12) - 1;
68 uint32_t offset = encoding_ & offset_mask; 69 uint32_t offset = encoding_ & offset_mask;
69 ASSERT(offset < 256); 70 ASSERT(offset < 256);
70 return (encoding_ & ~offset_mask) | ((offset & 0xf0) << 4) | (offset & 0xf); 71 return (encoding_ & ~offset_mask) | ((offset & 0xf0) << 4) | (offset & 0xf);
71 } 72 }
72 73
73 74
74 uint32_t Address::vencoding() const { 75 uint32_t Address::vencoding() const {
76 ASSERT(kind_ == Immediate);
75 const uint32_t offset_mask = (1 << 12) - 1; 77 const uint32_t offset_mask = (1 << 12) - 1;
76 uint32_t offset = encoding_ & offset_mask; 78 uint32_t offset = encoding_ & offset_mask;
77 ASSERT(offset < (1 << 10)); // In the range 0 to +1020. 79 ASSERT(offset < (1 << 10)); // In the range 0 to +1020.
78 ASSERT(Utils::IsAligned(offset, 4)); // Multiple of 4. 80 ASSERT(Utils::IsAligned(offset, 4)); // Multiple of 4.
79 int mode = encoding_ & ((8|4|1) << 21); 81 int mode = encoding_ & ((8|4|1) << 21);
80 ASSERT((mode == Offset) || (mode == NegOffset)); 82 ASSERT((mode == Offset) || (mode == NegOffset));
81 uint32_t vencoding = (encoding_ & (0xf << kRnShift)) | (offset >> 2); 83 uint32_t vencoding = (encoding_ & (0xf << kRnShift)) | (offset >> 2);
82 if (mode == Offset) { 84 if (mode == Offset) {
83 vencoding |= 1 << 23; 85 vencoding |= 1 << 23;
84 } 86 }
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133 135
134 136
135 void Assembler::EmitMemOp(Condition cond, 137 void Assembler::EmitMemOp(Condition cond,
136 bool load, 138 bool load,
137 bool byte, 139 bool byte,
138 Register rd, 140 Register rd,
139 Address ad) { 141 Address ad) {
140 ASSERT(rd != kNoRegister); 142 ASSERT(rd != kNoRegister);
141 ASSERT(cond != kNoCondition); 143 ASSERT(cond != kNoCondition);
142 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 144 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
143 B26 | 145 B26 | (ad.kind() == Address::Immediate ? 0 : B25) |
144 (load ? L : 0) | 146 (load ? L : 0) |
145 (byte ? B : 0) | 147 (byte ? B : 0) |
146 (static_cast<int32_t>(rd) << kRdShift) | 148 (static_cast<int32_t>(rd) << kRdShift) |
147 ad.encoding(); 149 ad.encoding();
148 Emit(encoding); 150 Emit(encoding);
149 } 151 }
150 152
151 153
152 void Assembler::EmitMemOpAddressMode3(Condition cond, 154 void Assembler::EmitMemOpAddressMode3(Condition cond,
153 int32_t mode, 155 int32_t mode,
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1574 // Do not reuse an existing entry, since each reference may be patched 1576 // Do not reuse an existing entry, since each reference may be patched
1575 // independently. 1577 // independently.
1576 object_pool_.Add(smi); 1578 object_pool_.Add(smi);
1577 return object_pool_.Length() - 1; 1579 return object_pool_.Length() - 1;
1578 } 1580 }
1579 1581
1580 } // namespace dart 1582 } // namespace dart
1581 1583
1582 #endif // defined TARGET_ARCH_ARM 1584 #endif // defined TARGET_ARCH_ARM
1583 1585
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