Emit VMLS for multiply-subtract on ARM.

src/arm/simulator-arm.cc

Index: src/arm/simulator-arm.cc
diff --git a/src/arm/simulator-arm.cc b/src/arm/simulator-arm.cc
index 86d061461630f9bf5060265c8862dbfceb4dac6d..fc7e0874d60fba0e52236ccbc75f077e61059426 100644
--- a/src/arm/simulator-arm.cc
+++ b/src/arm/simulator-arm.cc
@@ -2783,20 +2783,25 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
       double dm_value = get_double_from_d_register(vm);
       double dd_value = dn_value * dm_value;
       set_d_register_from_double(vd, dd_value);
-    } else if ((instr->Opc1Value() == 0x0) && !(instr->Opc3Value() & 0x1)) {
-      // vmla
+    } else if ((instr->Opc1Value() == 0x0)) {
+      // vmla, vmls
+      const bool op = (instr->Opc3Value() & 0x1);

[Rodolph Perfetta, 2013/02/26 13:19:23]

Use a more explicit name for op.

[hans, 2013/02/26 13:47:32]

Done.

[hans, 2013/02/26 13:47:32]

Done.

+
       if (instr->SzValue() != 0x1) {
         UNREACHABLE();  // Not used by V8.
       }
 
-      double dd_value = get_double_from_d_register(vd);
-      double dn_value = get_double_from_d_register(vn);
-      double dm_value = get_double_from_d_register(vm);
+      const double dd_val = get_double_from_d_register(vd);
+      const double dn_val = get_double_from_d_register(vn);
+      const double dm_val = get_double_from_d_register(vm);
 
-      // Note: we do the mul and add in separate steps to avoid getting a result
-      // with too high precision.
-      set_d_register_from_double(vd, dn_value * dm_value);
-      set_d_register_from_double(vd, get_double_from_d_register(vd) + dd_value);
+      // Note: we do the mul and add/sub in separate steps to avoid getting a
+      // result with too high precision.
+      set_d_register_from_double(vd, dn_val * dm_val);
+      if (op)

[Rodolph Perfetta, 2013/02/26 13:19:23]

in the rest of the file curly brackets tend to be used even for one liner
if/else.

[hans, 2013/02/26 13:47:32]

Done.

+        set_d_register_from_double(vd, dd_val - get_double_from_d_register(vd));
+      else
+        set_d_register_from_double(vd, dd_val + get_double_from_d_register(vd));
     } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) {
       // vdiv
       if (instr->SzValue() != 0x1) {