| Index: third_party/openmax_dl/dl/sp/src/armSP_FFT_CToC_SC16_Radix2_unsafe_s.S
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| diff --git a/third_party/openmax_dl/dl/sp/src/armSP_FFT_CToC_SC16_Radix2_unsafe_s.S b/third_party/openmax_dl/dl/sp/src/armSP_FFT_CToC_SC16_Radix2_unsafe_s.S
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| new file mode 100644
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| index 0000000000000000000000000000000000000000..f9bbebcca9198a00fa5dc7ce428c18634addbf28
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| --- /dev/null
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| +++ b/third_party/openmax_dl/dl/sp/src/armSP_FFT_CToC_SC16_Radix2_unsafe_s.S
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| @@ -0,0 +1,219 @@
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| +@//
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| +@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
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| +@//
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| +@// Use of this source code is governed by a BSD-style license
|
| +@// that can be found in the LICENSE file in the root of the source
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| +@// tree. An additional intellectual property rights grant can be found
|
| +@// in the file PATENTS. All contributing project authors may
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| +@// be found in the AUTHORS file in the root of the source tree.
|
| +@//
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| +@// This file was originally licensed as follows. It has been
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| +@// relicensed with permission from the copyright holders.
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| +
|
| +@//
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| +@//
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| +@// File Name: armSP_FFT_CToC_SC16_Radix2_unsafe_s.s
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| +@// OpenMAX DL: v1.0.2
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| +@// Last Modified Revision: 5892
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| +@// Last Modified Date: Thu, 07 Jun 2007
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| +@//
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| +@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
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| +@//
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| +@//
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| +@//
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| +@// Description:
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| +@// Compute a Radix 2 FFT stage for a N point complex signal
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| +@//
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| +@//
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| +
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| +
|
| +@// Include standard headers
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| +
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| +#include "dl/api/armCOMM_s.h"
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| +#include "dl/api/omxtypes_s.h"
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| +
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| +
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| +@// Import symbols required from other files
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| +@// (For example tables)
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| +
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| +
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| +
|
| +@// Set debugging level
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| +@//DEBUG_ON SETL {TRUE}
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| +
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| +
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| +
|
| +@// Guarding implementation by the processor name
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| +
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| +
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| +
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| +
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| + @// Guarding implementation by the processor name
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| +
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| +
|
| +@//Input Registers
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| +
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| +#define pSrc r0
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| +#define pDst r2
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| +#define pTwiddle r1
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| +#define subFFTNum r6
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| +#define subFFTSize r7
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| +
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| +
|
| +@//Output Registers
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| +
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| +
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| +@//Local Scratch Registers
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| +
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| +#define outPointStep r3
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| +#define pointStep r4
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| +#define grpCount r5
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| +#define setCount r8
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| +#define step r10
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| +#define dstStep r11
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| +#define pTmp r9
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| +
|
| +@// Neon Registers
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| +
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| +#define dW D0.S16
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| +#define dX0 D2.S16
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| +#define dX1 D3.S16
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| +#define dX2 D4.S16
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| +#define dX3 D5.S16
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| +#define dY0 D6.S16
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| +#define dY1 D7.S16
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| +#define dY2 D8.S16
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| +#define dY3 D9.S16
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| +#define qT0 Q3.S32
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| +#define qT1 Q4.S32
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| +
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| +
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| +
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| + .MACRO FFTSTAGE scaled, inverse, name
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| +
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| + @// Define stack arguments
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| +
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| +
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| + @// Update grpCount and grpSize rightaway inorder to reuse pGrpCount and pGrpSize regs
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| +
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| + LSR subFFTNum,subFFTNum,#1 @//grpSize
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| + LSL grpCount,subFFTSize,#1
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| +
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| +
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| + @// pT0+1 increments pT0 by 8 bytes
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| + @// pT0+pointStep = increment of 4*pointStep bytes = 2*grpSize bytes
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| + MOV pointStep,subFFTNum,LSL #1
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| +
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| + @// update subFFTSize for the next stage
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| + MOV subFFTSize,grpCount
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| +
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| + @// pOut0+1 increments pOut0 by 8 bytes
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| + @// pOut0+outPointStep == increment of 4*outPointStep bytes = 2*size bytes
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| + SMULBB outPointStep,grpCount,pointStep
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| + LSL pointStep,pointStep,#1
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| +
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| +
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| + RSB step,pointStep,#16
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| + RSB dstStep,outPointStep,#16
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| +
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| + @// Loop on the groups
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| +
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| +grpLoop\name:
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| +
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| + VLD1 dW,[pTwiddle],pointStep @//[wi | wr]
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| + MOV setCount,pointStep,LSR #2
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| +
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| +
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| + @// Loop on the sets: 4 at a time
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| +
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| +
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| +setLoop\name:
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| +
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| +
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| + VLD2 {dX0,dX1},[pSrc],pointStep @// point0: dX0-real part dX1-img part
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| + VLD2 {dX2,dX3},[pSrc],step @// point1: dX2-real part dX3-img part
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| +
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| + SUBS setCount,setCount,#4
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| +
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| + .ifeqs "\inverse", "TRUE"
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| + VMULL qT0,dX2,dW[0]
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| + VMLAL qT0,dX3,dW[1] @// real part
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| + VMULL qT1,dX3,dW[0]
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| + VMLSL qT1,dX2,dW[1] @// imag part
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| +
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| + .ELSE
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| +
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| + VMULL qT0,dX2,dW[0]
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| + VMLSL qT0,dX3,dW[1] @// real part
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| + VMULL qT1,dX3,dW[0]
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| + VMLAL qT1,dX2,dW[1] @// imag part
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| +
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| + .ENDIF
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| +
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| + VRSHRN dX2,qT0,#15
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| + VRSHRN dX3,qT1,#15
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| +
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| + .ifeqs "\scaled", "TRUE"
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| + VHSUB dY0,dX0,dX2
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| + VHSUB dY1,dX1,dX3
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| + VHADD dY2,dX0,dX2
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| + VHADD dY3,dX1,dX3
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| +
|
| + .ELSE
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| + VSUB dY0,dX0,dX2
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| + VSUB dY1,dX1,dX3
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| + VADD dY2,dX0,dX2
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| + VADD dY3,dX1,dX3
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| +
|
| + .ENDIF
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| +
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| + VST2 {dY0,dY1},[pDst],outPointStep
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| + VST2 {dY2,dY3},[pDst],dstStep @// dstStep = -outPointStep + 16
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| +
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| + BGT setLoop\name
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| +
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| + SUBS grpCount,grpCount,#2
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| + ADD pSrc,pSrc,pointStep
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| + BGT grpLoop\name
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| +
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| +
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| + @// Reset and Swap pSrc and pDst for the next stage
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| + MOV pTmp,pDst
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| + SUB pDst,pSrc,outPointStep,LSL #1 @// pDst -= 2*size; pSrc -= 4*size bytes
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| + SUB pSrc,pTmp,outPointStep
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| +
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| + @// Reset pTwiddle for the next stage
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| + SUB pTwiddle,pTwiddle,outPointStep @// pTwiddle -= 2*size bytes
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| +
|
| +
|
| + .endm
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| +
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| +
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| +
|
| + M_START armSP_FFTFwd_CToC_SC16_Radix2_OutOfPlace_unsafe,r4
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| + FFTSTAGE "FALSE","FALSE",FWD
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| + M_END
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| +
|
| +
|
| +
|
| + M_START armSP_FFTInv_CToC_SC16_Radix2_OutOfPlace_unsafe,r4
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| + FFTSTAGE "FALSE","TRUE",INV
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| + M_END
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| +
|
| +
|
| +
|
| + M_START armSP_FFTFwd_CToC_SC16_Sfs_Radix2_OutOfPlace_unsafe,r4
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| + FFTSTAGE "TRUE","FALSE",FWDSFS
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| + M_END
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| +
|
| +
|
| +
|
| + M_START armSP_FFTInv_CToC_SC16_Sfs_Radix2_OutOfPlace_unsafe,r4
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| + FFTSTAGE "TRUE","TRUE",INVSFS
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| + M_END
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| +
|
| +
|
| +
|
| +
|
| +
|
| + .END
|
|
|