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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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7092 STATIC_ASSERT(EQUAL == 0); | 7092 STATIC_ASSERT(EQUAL == 0); |
7093 STATIC_ASSERT(kSmiTag == 0); | 7093 STATIC_ASSERT(kSmiTag == 0); |
7094 __ mov(r0, Operand(Smi::FromInt(EQUAL)), LeaveCC, eq); | 7094 __ mov(r0, Operand(Smi::FromInt(EQUAL)), LeaveCC, eq); |
7095 __ Ret(); | 7095 __ Ret(); |
7096 | 7096 |
7097 __ bind(&miss); | 7097 __ bind(&miss); |
7098 GenerateMiss(masm); | 7098 GenerateMiss(masm); |
7099 } | 7099 } |
7100 | 7100 |
7101 | 7101 |
| 7102 void ICCompareStub::GenerateUniqueNames(MacroAssembler* masm) { |
| 7103 ASSERT(state_ == CompareIC::UNIQUE_NAME); |
| 7104 ASSERT(GetCondition() == eq); |
| 7105 Label miss; |
| 7106 |
| 7107 // Registers containing left and right operands respectively. |
| 7108 Register left = r1; |
| 7109 Register right = r0; |
| 7110 Register tmp1 = r2; |
| 7111 Register tmp2 = r3; |
| 7112 |
| 7113 // Check that both operands are heap objects. |
| 7114 __ JumpIfEitherSmi(left, right, &miss); |
| 7115 |
| 7116 // Check that both operands are unique names. This leaves the instance |
| 7117 // types loaded in tmp1 and tmp2. |
| 7118 STATIC_ASSERT(kInternalizedTag != 0); |
| 7119 __ ldr(tmp1, FieldMemOperand(left, HeapObject::kMapOffset)); |
| 7120 __ ldr(tmp2, FieldMemOperand(right, HeapObject::kMapOffset)); |
| 7121 __ ldrb(tmp1, FieldMemOperand(tmp1, Map::kInstanceTypeOffset)); |
| 7122 __ ldrb(tmp2, FieldMemOperand(tmp2, Map::kInstanceTypeOffset)); |
| 7123 |
| 7124 Label succeed1; |
| 7125 __ tst(tmp1, Operand(kIsInternalizedMask)); |
| 7126 __ b(ne, &succeed1); |
| 7127 __ cmp(tmp1, Operand(SYMBOL_TYPE)); |
| 7128 __ b(ne, &miss); |
| 7129 __ bind(&succeed1); |
| 7130 |
| 7131 Label succeed2; |
| 7132 __ tst(tmp2, Operand(kIsInternalizedMask)); |
| 7133 __ b(ne, &succeed2); |
| 7134 __ cmp(tmp2, Operand(SYMBOL_TYPE)); |
| 7135 __ b(ne, &miss); |
| 7136 __ bind(&succeed2); |
| 7137 |
| 7138 // Unique names are compared by identity. |
| 7139 __ cmp(left, right); |
| 7140 // Make sure r0 is non-zero. At this point input operands are |
| 7141 // guaranteed to be non-zero. |
| 7142 ASSERT(right.is(r0)); |
| 7143 STATIC_ASSERT(EQUAL == 0); |
| 7144 STATIC_ASSERT(kSmiTag == 0); |
| 7145 __ mov(r0, Operand(Smi::FromInt(EQUAL)), LeaveCC, eq); |
| 7146 __ Ret(); |
| 7147 |
| 7148 __ bind(&miss); |
| 7149 GenerateMiss(masm); |
| 7150 } |
| 7151 |
| 7152 |
7102 void ICCompareStub::GenerateStrings(MacroAssembler* masm) { | 7153 void ICCompareStub::GenerateStrings(MacroAssembler* masm) { |
7103 ASSERT(state_ == CompareIC::STRING); | 7154 ASSERT(state_ == CompareIC::STRING); |
7104 Label miss; | 7155 Label miss; |
7105 | 7156 |
7106 bool equality = Token::IsEqualityOp(op_); | 7157 bool equality = Token::IsEqualityOp(op_); |
7107 | 7158 |
7108 // Registers containing left and right operands respectively. | 7159 // Registers containing left and right operands respectively. |
7109 Register left = r1; | 7160 Register left = r1; |
7110 Register right = r0; | 7161 Register right = r0; |
7111 Register tmp1 = r2; | 7162 Register tmp1 = r2; |
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7949 | 8000 |
7950 __ Pop(lr, r5, r1); | 8001 __ Pop(lr, r5, r1); |
7951 __ Ret(); | 8002 __ Ret(); |
7952 } | 8003 } |
7953 | 8004 |
7954 #undef __ | 8005 #undef __ |
7955 | 8006 |
7956 } } // namespace v8::internal | 8007 } } // namespace v8::internal |
7957 | 8008 |
7958 #endif // V8_TARGET_ARCH_ARM | 8009 #endif // V8_TARGET_ARCH_ARM |
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