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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 693 // bind(&L); // illegal: a label may be bound only once | 693 // bind(&L); // illegal: a label may be bound only once |
| 694 // | 694 // |
| 695 // Note: The same Label can be used for forward and backward branches | 695 // Note: The same Label can be used for forward and backward branches |
| 696 // but it may be bound only once. | 696 // but it may be bound only once. |
| 697 | 697 |
| 698 void bind(Label* L); // binds an unbound label L to the current code position | 698 void bind(Label* L); // binds an unbound label L to the current code position |
| 699 | 699 |
| 700 // Returns the branch offset to the given label from the current code position | 700 // Returns the branch offset to the given label from the current code position |
| 701 // Links the label to the current position if it is still unbound | 701 // Links the label to the current position if it is still unbound |
| 702 // Manages the jump elimination optimization if the second parameter is true. | 702 // Manages the jump elimination optimization if the second parameter is true. |
| 703 int branch_offset(Label* L, bool jump_elimination_allowed); | 703 int branch_offset(Label* L); |
| 704 | 704 |
| 705 // Returns true if the given pc address is the start of a constant pool load | 705 // Returns true if the given pc address is the start of a constant pool load |
| 706 // instruction sequence. | 706 // instruction sequence. |
| 707 INLINE(static bool is_constant_pool_load(Address pc)); | 707 INLINE(static bool is_constant_pool_load(Address pc)); |
| 708 | 708 |
| 709 // Return the address in the constant pool of the code target address used by | 709 // Return the address in the constant pool of the code target address used by |
| 710 // the branch/call instruction at pc, or the object in a mov. | 710 // the branch/call instruction at pc, or the object in a mov. |
| 711 INLINE(static Address constant_pool_entry_address(Address pc, | 711 INLINE(static Address constant_pool_entry_address(Address pc, |
| 712 Address constant_pool)); | 712 Address constant_pool)); |
| 713 | 713 |
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| 799 void CodeTargetAlign(); | 799 void CodeTargetAlign(); |
| 800 | 800 |
| 801 // Branch instructions | 801 // Branch instructions |
| 802 void b(int branch_offset, Condition cond = al); | 802 void b(int branch_offset, Condition cond = al); |
| 803 void bl(int branch_offset, Condition cond = al); | 803 void bl(int branch_offset, Condition cond = al); |
| 804 void blx(int branch_offset); // v5 and above | 804 void blx(int branch_offset); // v5 and above |
| 805 void blx(Register target, Condition cond = al); // v5 and above | 805 void blx(Register target, Condition cond = al); // v5 and above |
| 806 void bx(Register target, Condition cond = al); // v5 and above, plus v4t | 806 void bx(Register target, Condition cond = al); // v5 and above, plus v4t |
| 807 | 807 |
| 808 // Convenience branch instructions using labels | 808 // Convenience branch instructions using labels |
| 809 void b(Label* L, Condition cond = al) { | 809 void b(Label* L, Condition cond = al) { b(branch_offset(L), cond); } |
| 810 b(branch_offset(L, cond == al), cond); | 810 void b(Condition cond, Label* L) { b(L, cond); } |
| 811 } | 811 void bl(Label* L, Condition cond = al) { bl(branch_offset(L), cond); } |
| 812 void b(Condition cond, Label* L) { b(branch_offset(L, cond == al), cond); } | 812 void bl(Condition cond, Label* L) { bl(branch_offset(L), cond); } |
| 813 void bl(Label* L, Condition cond = al) { bl(branch_offset(L, false), cond); } | 813 void blx(Label* L) { blx(branch_offset(L)); } // v5 and above |
| 814 void bl(Condition cond, Label* L) { bl(branch_offset(L, false), cond); } | |
| 815 void blx(Label* L) { blx(branch_offset(L, false)); } // v5 and above | |
| 816 | 814 |
| 817 // Data-processing instructions | 815 // Data-processing instructions |
| 818 | 816 |
| 819 void and_(Register dst, Register src1, const Operand& src2, | 817 void and_(Register dst, Register src1, const Operand& src2, |
| 820 SBit s = LeaveCC, Condition cond = al); | 818 SBit s = LeaveCC, Condition cond = al); |
| 821 | 819 |
| 822 void eor(Register dst, Register src1, const Operand& src2, | 820 void eor(Register dst, Register src1, const Operand& src2, |
| 823 SBit s = LeaveCC, Condition cond = al); | 821 SBit s = LeaveCC, Condition cond = al); |
| 824 | 822 |
| 825 void sub(Register dst, Register src1, const Operand& src2, | 823 void sub(Register dst, Register src1, const Operand& src2, |
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| 1663 public: | 1661 public: |
| 1664 explicit EnsureSpace(Assembler* assembler) { | 1662 explicit EnsureSpace(Assembler* assembler) { |
| 1665 assembler->CheckBuffer(); | 1663 assembler->CheckBuffer(); |
| 1666 } | 1664 } |
| 1667 }; | 1665 }; |
| 1668 | 1666 |
| 1669 | 1667 |
| 1670 } } // namespace v8::internal | 1668 } } // namespace v8::internal |
| 1671 | 1669 |
| 1672 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1670 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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