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Side by Side Diff: runtime/vm/assembler_arm.h

Issue 12260026: Add support for object pool (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 10 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_ASSEMBLER_ARM_H_ 5 #ifndef VM_ASSEMBLER_ARM_H_
6 #define VM_ASSEMBLER_ARM_H_ 6 #define VM_ASSEMBLER_ARM_H_
7 7
8 #ifndef VM_ASSEMBLER_H_ 8 #ifndef VM_ASSEMBLER_H_
9 #error Do not include assembler_arm.h directly; use assembler.h instead. 9 #error Do not include assembler_arm.h directly; use assembler.h instead.
10 #endif 10 #endif
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257 Address::operator=(other); 257 Address::operator=(other);
258 return *this; 258 return *this;
259 } 259 }
260 }; 260 };
261 261
262 262
263 class Assembler : public ValueObject { 263 class Assembler : public ValueObject {
264 public: 264 public:
265 Assembler() 265 Assembler()
266 : buffer_(), 266 : buffer_(),
267 object_pool_(GrowableObjectArray::Handle(GrowableObjectArray::New())), 267 object_pool_(GrowableObjectArray::Handle()),
268 prologue_offset_(-1), 268 prologue_offset_(-1),
269 comments_() { } 269 comments_() { }
270 ~Assembler() { } 270 ~Assembler() { }
271 271
272 void PopRegister(Register r) { Pop(r); } 272 void PopRegister(Register r) { Pop(r); }
273 273
274 void Bind(Label* label); 274 void Bind(Label* label);
275 275
276 // Misc. functionality 276 // Misc. functionality
277 int CodeSize() const { return buffer_.Size(); } 277 int CodeSize() const { return buffer_.Size(); }
278 int prologue_offset() const { return prologue_offset_; } 278 int prologue_offset() const { return prologue_offset_; }
279 const ZoneGrowableArray<int>& GetPointerOffsets() const { 279 const ZoneGrowableArray<int>& GetPointerOffsets() const {
280 ASSERT(buffer_.pointer_offsets().length() == 0); // No pointers in code. 280 ASSERT(buffer_.pointer_offsets().length() == 0); // No pointers in code.
281 return buffer_.pointer_offsets(); 281 return buffer_.pointer_offsets();
282 } 282 }
283 const GrowableObjectArray& object_pool() const { 283 const GrowableObjectArray& object_pool() const { return object_pool_; }
284 return object_pool_;
285 }
286 284
287 void FinalizeInstructions(const MemoryRegion& region) { 285 void FinalizeInstructions(const MemoryRegion& region) {
288 buffer_.FinalizeInstructions(region); 286 buffer_.FinalizeInstructions(region);
289 ASSERT(object_pool_.Length() == 0); // TODO(regis): Otherwise, more work.
290 } 287 }
291 288
292 // Debugging and bringup support. 289 // Debugging and bringup support.
293 void Stop(const char* message); 290 void Stop(const char* message);
294 void Unimplemented(const char* message); 291 void Unimplemented(const char* message);
295 void Untested(const char* message); 292 void Untested(const char* message);
296 void Unreachable(const char* message); 293 void Unreachable(const char* message);
297 294
298 static void InitializeMemoryWithBreakpoints(uword data, int length); 295 static void InitializeMemoryWithBreakpoints(uword data, int length);
299 296
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452 void vcmpsz(SRegister sd, Condition cond = AL); 449 void vcmpsz(SRegister sd, Condition cond = AL);
453 void vcmpdz(DRegister dd, Condition cond = AL); 450 void vcmpdz(DRegister dd, Condition cond = AL);
454 void vmstat(Condition cond = AL); // VMRS APSR_nzcv, FPSCR 451 void vmstat(Condition cond = AL); // VMRS APSR_nzcv, FPSCR
455 452
456 // Branch instructions. 453 // Branch instructions.
457 void b(Label* label, Condition cond = AL); 454 void b(Label* label, Condition cond = AL);
458 void bl(Label* label, Condition cond = AL); 455 void bl(Label* label, Condition cond = AL);
459 void blx(Register rm, Condition cond = AL); 456 void blx(Register rm, Condition cond = AL);
460 457
461 // Macros. 458 // Macros.
462 // Branch to an entry address that can be patched at runtime. 459 // Branch to an entry address. Call sequence is never patched.
463 void Branch(const ExternalLabel* label); 460 void Branch(const ExternalLabel* label);
461
462 // Branch and link to an entry address. Call sequence is never patched.
464 void BranchLink(const ExternalLabel* label); 463 void BranchLink(const ExternalLabel* label);
465 464
466 // Branch to entry after setting LR and storing LR at ad. 465 // Branch and link to an entry address. Call sequence can be patched.
466 void BranchLinkPatchable(const ExternalLabel* label);
467
468 // Branch and link to entry after storing return address at ad.
469 // Call sequence is never patched.
467 void BranchLinkStore(const ExternalLabel* label, Address ad); 470 void BranchLinkStore(const ExternalLabel* label, Address ad);
468 471
469 // Branch to [base + offset] after setting LR. 472 // Branch and link to [base + offset]. Call sequence is never patched.
470 void BranchLinkOffset(Register base, int offset); 473 void BranchLinkOffset(Register base, int offset);
471 474
472 // Add signed constant value to rd. May clobber IP. 475 // Add signed constant value to rd. May clobber IP.
473 void AddConstant(Register rd, int32_t value, Condition cond = AL); 476 void AddConstant(Register rd, int32_t value, Condition cond = AL);
474 void AddConstant(Register rd, Register rn, int32_t value, 477 void AddConstant(Register rd, Register rn, int32_t value,
475 Condition cond = AL); 478 Condition cond = AL);
476 void AddConstantSetFlags(Register rd, Register rn, int32_t value, 479 void AddConstantSetFlags(Register rd, Register rn, int32_t value,
477 Condition cond = AL); 480 Condition cond = AL);
478 void AddConstantWithCarry(Register rd, Register rn, int32_t value, 481 void AddConstantWithCarry(Register rd, Register rn, int32_t value,
479 Condition cond = AL); 482 Condition cond = AL);
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526 void Lsr(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL); 529 void Lsr(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
527 void Asr(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL); 530 void Asr(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
528 void Ror(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL); 531 void Ror(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
529 void Rrx(Register rd, Register rm, Condition cond = AL); 532 void Rrx(Register rd, Register rm, Condition cond = AL);
530 533
531 // Emit data (e.g encoded instruction or immediate) in instruction stream. 534 // Emit data (e.g encoded instruction or immediate) in instruction stream.
532 void Emit(int32_t value); 535 void Emit(int32_t value);
533 536
534 private: 537 private:
535 AssemblerBuffer buffer_; // Contains position independent code. 538 AssemblerBuffer buffer_; // Contains position independent code.
536 const GrowableObjectArray& object_pool_; // Objects and jump targets. 539 GrowableObjectArray& object_pool_; // Objects and patchable jump targets.
537 int32_t prologue_offset_; 540 int32_t prologue_offset_;
538 541
539 int32_t AddObject(const Object& obj); 542 int32_t AddObject(const Object& obj);
540 int32_t AddExternalLabel(const ExternalLabel* label); 543 int32_t AddExternalLabel(const ExternalLabel* label);
541 544
542 class CodeComment : public ZoneAllocated { 545 class CodeComment : public ZoneAllocated {
543 public: 546 public:
544 CodeComment(intptr_t pc_offset, const String& comment) 547 CodeComment(intptr_t pc_offset, const String& comment)
545 : pc_offset_(pc_offset), comment_(comment) { } 548 : pc_offset_(pc_offset), comment_(comment) { }
546 549
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635 return *reg1 - *reg2; 638 return *reg1 - *reg2;
636 } 639 }
637 640
638 DISALLOW_ALLOCATION(); 641 DISALLOW_ALLOCATION();
639 DISALLOW_COPY_AND_ASSIGN(Assembler); 642 DISALLOW_COPY_AND_ASSIGN(Assembler);
640 }; 643 };
641 644
642 } // namespace dart 645 } // namespace dart
643 646
644 #endif // VM_ASSEMBLER_ARM_H_ 647 #endif // VM_ASSEMBLER_ARM_H_
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