| Index: src/IceAssemblerX86BaseImpl.h
|
| diff --git a/src/IceAssemblerX86BaseImpl.h b/src/IceAssemblerX86BaseImpl.h
|
| index f8ba4d4fdb498f2448cddd1b242ff4ed72bb9079..8d39f08cd62c00e5148acb927dc5e8b0419ddc5f 100644
|
| --- a/src/IceAssemblerX86BaseImpl.h
|
| +++ b/src/IceAssemblerX86BaseImpl.h
|
| @@ -148,12 +148,16 @@ void AssemblerX86Base<Machine>::popl(const typename Traits::Address &address) {
|
| emitOperand(0, address);
|
| }
|
|
|
| -template <class Machine> void AssemblerX86Base<Machine>::pushal() {
|
| +template <class Machine>
|
| +template <typename, typename>
|
| +void AssemblerX86Base<Machine>::pushal() {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0x60);
|
| }
|
|
|
| -template <class Machine> void AssemblerX86Base<Machine>::popal() {
|
| +template <class Machine>
|
| +template <typename, typename>
|
| +void AssemblerX86Base<Machine>::popal() {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0x61);
|
| }
|
| @@ -529,23 +533,24 @@ void AssemblerX86Base<Machine>::divss(Type Ty, typename Traits::XmmRegister dst,
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::fld(Type Ty,
|
| - const typename Traits::Address &src) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::fld(Type Ty, const typename T::Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
|
| emitOperand(0, src);
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::fstp(Type Ty,
|
| - const typename Traits::Address &dst) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::fstp(Type Ty, const typename T::Address &dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
|
| emitOperand(3, dst);
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::fstp(typename Traits::X87STRegister st) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::fstp(typename T::X87STRegister st) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0xDD);
|
| emitUint8(0xD8 + st);
|
| @@ -1775,48 +1780,56 @@ void AssemblerX86Base<Machine>::roundsd(typename Traits::XmmRegister dst,
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::fnstcw(const typename Traits::Address &dst) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::fnstcw(const typename T::Address &dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0xD9);
|
| emitOperand(7, dst);
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::fldcw(const typename Traits::Address &src) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::fldcw(const typename T::Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0xD9);
|
| emitOperand(5, src);
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::fistpl(const typename Traits::Address &dst) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::fistpl(const typename T::Address &dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0xDF);
|
| emitOperand(7, dst);
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::fistps(const typename Traits::Address &dst) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::fistps(const typename T::Address &dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0xDB);
|
| emitOperand(3, dst);
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::fildl(const typename Traits::Address &src) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::fildl(const typename T::Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0xDF);
|
| emitOperand(5, src);
|
| }
|
|
|
| template <class Machine>
|
| -void AssemblerX86Base<Machine>::filds(const typename Traits::Address &src) {
|
| +template <typename T, typename>
|
| +void AssemblerX86Base<Machine>::filds(const typename T::Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0xDB);
|
| emitOperand(0, src);
|
| }
|
|
|
| -template <class Machine> void AssemblerX86Base<Machine>::fincstp() {
|
| +template <class Machine>
|
| +template <typename, typename>
|
| +void AssemblerX86Base<Machine>::fincstp() {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0xD9);
|
| emitUint8(0xF7);
|
| @@ -2400,6 +2413,7 @@ void AssemblerX86Base<Machine>::mul(Type Ty,
|
| }
|
|
|
| template <class Machine>
|
| +template <typename, typename>
|
| void AssemblerX86Base<Machine>::incl(typename Traits::GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0x40 + reg);
|
| @@ -2413,6 +2427,7 @@ void AssemblerX86Base<Machine>::incl(const typename Traits::Address &address) {
|
| }
|
|
|
| template <class Machine>
|
| +template <typename, typename>
|
| void AssemblerX86Base<Machine>::decl(typename Traits::GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&Buffer);
|
| emitUint8(0x48 + reg);
|
|
|