Add ARMv8-A to the supported list of arm platforms

src/base/atomicops_internals_arm_gcc.h

 // Copyright 2010 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // This file is an internal atomic implementation, use atomicops.h instead.
 //
 // LinuxKernelCmpxchg and Barrier_AtomicIncrement are from Google Gears.
 
 #ifndef V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_
 #define V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_
@@ skipping 41 matching lines @@
   __cpu_membarrier();
 #else
 #error MemoryBarrier() is not implemented on this platform.
 #endif
 }
 
 // An ARM toolchain would only define one of these depending on which
 // variant of the target architecture is being used. This tests against
 // any known ARMv6 or ARMv7 variant, where it is possible to directly
 // use ldrex/strex instructions to implement fast atomic operations.
-#if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) ||  \
+#if defined(__ARM_ARCH_8A__) || \
+    defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) ||  \
     defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) || \
     defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) ||  \
     defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \
     defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__)
 
 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
                                          Atomic32 old_value,
                                          Atomic32 new_value) {
   Atomic32 prev_value;
   int reloop;
@@ skipping 219 matching lines @@
 
 inline void NoBarrier_Store(volatile Atomic8* ptr, Atomic8 value) {
   *ptr = value;
 }
 
 inline Atomic8 NoBarrier_Load(volatile const Atomic8* ptr) { return *ptr; }
 
 } }  // namespace v8::base
 
 #endif  // V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_