[arm] Fix missing CheckBuffer for branches.

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 788 matching lines @@
   void CodeTargetAlign();
 
   // Branch instructions
   void b(int branch_offset, Condition cond = al);
   void bl(int branch_offset, Condition cond = al);
   void blx(int branch_offset);  // v5 and above
   void blx(Register target, Condition cond = al);  // v5 and above
   void bx(Register target, Condition cond = al);  // v5 and above, plus v4t
 
   // Convenience branch instructions using labels
-  void b(Label* L, Condition cond = al) { b(branch_offset(L), cond); }
+  void b(Label* L, Condition cond = al);
   void b(Condition cond, Label* L) { b(L, cond); }
-  void bl(Label* L, Condition cond = al) { bl(branch_offset(L), cond); }
-  void bl(Condition cond, Label* L) { bl(branch_offset(L), cond); }
-  void blx(Label* L) { blx(branch_offset(L)); }  // v5 and above
+  void bl(Label* L, Condition cond = al);
+  void bl(Condition cond, Label* L) { bl(L, cond); }
+  void blx(Label* L);  // v5 and above
 
   // Data-processing instructions
 
   void and_(Register dst, Register src1, const Operand& src2,
             SBit s = LeaveCC, Condition cond = al);
 
   void eor(Register dst, Register src1, const Operand& src2,
            SBit s = LeaveCC, Condition cond = al);
 
   void sub(Register dst, Register src1, const Operand& src2,
@@ skipping 837 matching lines @@
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBuffer();
   }
 };
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_