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| 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 165 // If no check is needed nothing is inserted. | 165 // If no check is needed nothing is inserted. |
| 166 void div0Check(Type Ty, Operand *SrcLo, Operand *SrcHi); | 166 void div0Check(Type Ty, Operand *SrcLo, Operand *SrcHi); |
| 167 typedef void (TargetARM32::*ExtInstr)(Variable *, Variable *, | 167 typedef void (TargetARM32::*ExtInstr)(Variable *, Variable *, |
| 168 CondARM32::Cond); | 168 CondARM32::Cond); |
| 169 typedef void (TargetARM32::*DivInstr)(Variable *, Variable *, Variable *, | 169 typedef void (TargetARM32::*DivInstr)(Variable *, Variable *, Variable *, |
| 170 CondARM32::Cond); | 170 CondARM32::Cond); |
| 171 void lowerIDivRem(Variable *Dest, Variable *T, Variable *Src0R, Operand *Src1, | 171 void lowerIDivRem(Variable *Dest, Variable *T, Variable *Src0R, Operand *Src1, |
| 172 ExtInstr ExtFunc, DivInstr DivFunc, | 172 ExtInstr ExtFunc, DivInstr DivFunc, |
| 173 const char *DivHelperName, bool IsRemainder); | 173 const char *DivHelperName, bool IsRemainder); |
| 174 | 174 |
| 175 void lowerCLZ(Variable *Dest, Variable *ValLo, Variable *ValHi); | |
| 176 | |
| 175 // The following are helpers that insert lowered ARM32 instructions | 177 // The following are helpers that insert lowered ARM32 instructions |
| 176 // with minimal syntactic overhead, so that the lowering code can | 178 // with minimal syntactic overhead, so that the lowering code can |
| 177 // look as close to assembly as practical. | 179 // look as close to assembly as practical. |
| 178 | 180 |
| 179 void _add(Variable *Dest, Variable *Src0, Operand *Src1, | 181 void _add(Variable *Dest, Variable *Src0, Operand *Src1, |
| 180 CondARM32::Cond Pred = CondARM32::AL) { | 182 CondARM32::Cond Pred = CondARM32::AL) { |
| 181 Context.insert(InstARM32Add::create(Func, Dest, Src0, Src1, Pred)); | 183 Context.insert(InstARM32Add::create(Func, Dest, Src0, Src1, Pred)); |
| 182 } | 184 } |
| 183 void _adds(Variable *Dest, Variable *Src0, Operand *Src1, | 185 void _adds(Variable *Dest, Variable *Src0, Operand *Src1, |
| 184 CondARM32::Cond Pred = CondARM32::AL) { | 186 CondARM32::Cond Pred = CondARM32::AL) { |
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| 217 void _br(CfgNode *Target, CondARM32::Cond Condition) { | 219 void _br(CfgNode *Target, CondARM32::Cond Condition) { |
| 218 Context.insert(InstARM32Br::create(Func, Target, Condition)); | 220 Context.insert(InstARM32Br::create(Func, Target, Condition)); |
| 219 } | 221 } |
| 220 void _br(InstARM32Label *Label, CondARM32::Cond Condition) { | 222 void _br(InstARM32Label *Label, CondARM32::Cond Condition) { |
| 221 Context.insert(InstARM32Br::create(Func, Label, Condition)); | 223 Context.insert(InstARM32Br::create(Func, Label, Condition)); |
| 222 } | 224 } |
| 223 void _cmp(Variable *Src0, Operand *Src1, | 225 void _cmp(Variable *Src0, Operand *Src1, |
| 224 CondARM32::Cond Pred = CondARM32::AL) { | 226 CondARM32::Cond Pred = CondARM32::AL) { |
| 225 Context.insert(InstARM32Cmp::create(Func, Src0, Src1, Pred)); | 227 Context.insert(InstARM32Cmp::create(Func, Src0, Src1, Pred)); |
| 226 } | 228 } |
| 229 void _clz(Variable *Dest, Variable *Src0, | |
| 230 CondARM32::Cond Pred = CondARM32::AL) { | |
| 231 Context.insert(InstARM32Clz::create(Func, Dest, Src0, Pred)); | |
| 232 } | |
| 227 void _eor(Variable *Dest, Variable *Src0, Operand *Src1, | 233 void _eor(Variable *Dest, Variable *Src0, Operand *Src1, |
| 228 CondARM32::Cond Pred = CondARM32::AL) { | 234 CondARM32::Cond Pred = CondARM32::AL) { |
| 229 Context.insert(InstARM32Eor::create(Func, Dest, Src0, Src1, Pred)); | 235 Context.insert(InstARM32Eor::create(Func, Dest, Src0, Src1, Pred)); |
| 230 } | 236 } |
| 231 void _ldr(Variable *Dest, OperandARM32Mem *Addr, | 237 void _ldr(Variable *Dest, OperandARM32Mem *Addr, |
| 232 CondARM32::Cond Pred = CondARM32::AL) { | 238 CondARM32::Cond Pred = CondARM32::AL) { |
| 233 Context.insert(InstARM32Ldr::create(Func, Dest, Addr, Pred)); | 239 Context.insert(InstARM32Ldr::create(Func, Dest, Addr, Pred)); |
| 234 } | 240 } |
| 235 void _lsl(Variable *Dest, Variable *Src0, Operand *Src1, | 241 void _lsl(Variable *Dest, Variable *Src0, Operand *Src1, |
| 236 CondARM32::Cond Pred = CondARM32::AL) { | 242 CondARM32::Cond Pred = CondARM32::AL) { |
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| 294 } | 300 } |
| 295 void _push(const VarList &Sources) { | 301 void _push(const VarList &Sources) { |
| 296 Context.insert(InstARM32Push::create(Func, Sources)); | 302 Context.insert(InstARM32Push::create(Func, Sources)); |
| 297 } | 303 } |
| 298 void _pop(const VarList &Dests) { | 304 void _pop(const VarList &Dests) { |
| 299 Context.insert(InstARM32Pop::create(Func, Dests)); | 305 Context.insert(InstARM32Pop::create(Func, Dests)); |
| 300 // Mark dests as modified. | 306 // Mark dests as modified. |
| 301 for (Variable *Dest : Dests) | 307 for (Variable *Dest : Dests) |
| 302 Context.insert(InstFakeDef::create(Func, Dest)); | 308 Context.insert(InstFakeDef::create(Func, Dest)); |
| 303 } | 309 } |
| 310 void _rbit(Variable *Dest, Variable *Src0, | |
| 311 CondARM32::Cond Pred = CondARM32::AL) { | |
| 312 Context.insert(InstARM32Rbit::create(Func, Dest, Src0, Pred)); | |
| 313 } | |
| 314 void _rev(Variable *Dest, Variable *Src0, | |
| 315 CondARM32::Cond Pred = CondARM32::AL) { | |
| 316 Context.insert(InstARM32Rev::create(Func, Dest, Src0, Pred)); | |
| 317 } | |
| 304 void _ret(Variable *LR, Variable *Src0 = nullptr) { | 318 void _ret(Variable *LR, Variable *Src0 = nullptr) { |
| 305 Context.insert(InstARM32Ret::create(Func, LR, Src0)); | 319 Context.insert(InstARM32Ret::create(Func, LR, Src0)); |
| 306 } | 320 } |
| 307 void _rsb(Variable *Dest, Variable *Src0, Operand *Src1, | 321 void _rsb(Variable *Dest, Variable *Src0, Operand *Src1, |
| 308 CondARM32::Cond Pred = CondARM32::AL) { | 322 CondARM32::Cond Pred = CondARM32::AL) { |
| 309 Context.insert(InstARM32Rsb::create(Func, Dest, Src0, Src1, Pred)); | 323 Context.insert(InstARM32Rsb::create(Func, Dest, Src0, Src1, Pred)); |
| 310 } | 324 } |
| 311 void _sbc(Variable *Dest, Variable *Src0, Operand *Src1, | 325 void _sbc(Variable *Dest, Variable *Src0, Operand *Src1, |
| 312 CondARM32::Cond Pred = CondARM32::AL) { | 326 CondARM32::Cond Pred = CondARM32::AL) { |
| 313 Context.insert(InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred)); | 327 Context.insert(InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred)); |
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| 354 Context.insert( | 368 Context.insert( |
| 355 InstARM32Umull::create(Func, DestLo, DestHi, Src0, Src1, Pred)); | 369 InstARM32Umull::create(Func, DestLo, DestHi, Src0, Src1, Pred)); |
| 356 // Model the modification to the second dest as a fake def. | 370 // Model the modification to the second dest as a fake def. |
| 357 // Note that the def is not predicated. | 371 // Note that the def is not predicated. |
| 358 Context.insert(InstFakeDef::create(Func, DestHi, DestLo)); | 372 Context.insert(InstFakeDef::create(Func, DestHi, DestLo)); |
| 359 } | 373 } |
| 360 void _uxt(Variable *Dest, Variable *Src0, | 374 void _uxt(Variable *Dest, Variable *Src0, |
| 361 CondARM32::Cond Pred = CondARM32::AL) { | 375 CondARM32::Cond Pred = CondARM32::AL) { |
| 362 Context.insert(InstARM32Uxt::create(Func, Dest, Src0, Pred)); | 376 Context.insert(InstARM32Uxt::create(Func, Dest, Src0, Pred)); |
| 363 } | 377 } |
| 378 void _set_dest_nonkillable() { | |
| 379 Context.getLastInserted()->setDestNonKillable(); | |
|
John
2015/07/08 21:49:21
_set_dest_nonkillable is used in pretty much every
jvoung (off chromium)
2015/07/09 01:11:24
Done.
| |
| 380 } | |
| 364 | 381 |
| 365 TargetARM32Features CPUFeatures; | 382 TargetARM32Features CPUFeatures; |
| 366 bool UsesFramePointer = false; | 383 bool UsesFramePointer = false; |
| 367 bool NeedsStackAlignment = false; | 384 bool NeedsStackAlignment = false; |
| 368 bool MaybeLeafFunc = true; | 385 bool MaybeLeafFunc = true; |
| 369 size_t SpillAreaSizeBytes = 0; | 386 size_t SpillAreaSizeBytes = 0; |
| 370 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; | 387 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; |
| 371 llvm::SmallBitVector ScratchRegs; | 388 llvm::SmallBitVector ScratchRegs; |
| 372 llvm::SmallBitVector RegsUsed; | 389 llvm::SmallBitVector RegsUsed; |
| 373 VarList PhysicalRegisters[IceType_NUM]; | 390 VarList PhysicalRegisters[IceType_NUM]; |
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| 443 | 460 |
| 444 private: | 461 private: |
| 445 ~TargetHeaderARM32() = default; | 462 ~TargetHeaderARM32() = default; |
| 446 | 463 |
| 447 TargetARM32Features CPUFeatures; | 464 TargetARM32Features CPUFeatures; |
| 448 }; | 465 }; |
| 449 | 466 |
| 450 } // end of namespace Ice | 467 } // end of namespace Ice |
| 451 | 468 |
| 452 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H | 469 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H |
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