Generate first ARM assembler test and execute (simulate) it.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 
 namespace dart {
@@ skipping 54 matching lines @@
   uint32_t offset = encoding_ & offset_mask;
   ASSERT(offset < 256);
   return (encoding_ & ~offset_mask) | ((offset & 0xf0) << 4) | (offset & 0xf);
 }
 
 
 uint32_t Address::vencoding() const {
   const uint32_t offset_mask = (1 << 12) - 1;
   uint32_t offset = encoding_ & offset_mask;
   ASSERT(offset < (1 << 10));  // In the range 0 to +1020.
-  ASSERT(Utils::Utils::IsAligned(offset, 2));  // Multiple of 4.
+  ASSERT(Utils::IsAligned(offset, 4));  // Multiple of 4.
   int mode = encoding_ & ((8|4|1) << 21);
   ASSERT((mode == Offset) || (mode == NegOffset));
   uint32_t vencoding = (encoding_ & (0xf << kRnShift)) | (offset >> 2);
   if (mode == Offset) {
     vencoding |= 1 << 23;
   }
   return vencoding;
 }
 
 
+void Assembler::InitializeMemoryWithBreakpoints(uword data, int length) {
+  ASSERT(Utils::IsAligned(data, 4));
+  ASSERT(Utils::IsAligned(length, 4));
+  const uword end = data + length;
+  while (data < end) {
+    *reinterpret_cast<int32_t*>(data) = Instr::kBreakPointInstruction;
+    data += 4;
+  }
+}
+
+
 void Assembler::Emit(int32_t value) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   buffer_.Emit<int32_t>(value);
 }
 
 
 void Assembler::EmitType01(Condition cond,
                            int type,
                            Opcode opcode,
                            int set_cc,
@@ skipping 917 matching lines @@
 void Assembler::MarkExceptionHandler(Label* label) {
   EmitType01(AL, 1, TST, 1, PC, R0, ShifterOperand(0));
   Label l;
   b(&l);
   EmitBranch(AL, label, false);
   Bind(&l);
 }
 
 
 void Assembler::LoadObject(Register rd, const Object& object) {
-  UNIMPLEMENTED();
+  // TODO(regis): If the object is never relocated (null, true, false, ...),
+  // load as immediate.
+  const int32_t offset =
+      Array::data_offset() + 4*AddObject(object) - kHeapObjectTag;
+  if (Address::CanHoldLoadOffset(kLoadWord, offset)) {
+    ldr(rd, Address(CP, offset));
+  } else {
+    int32_t offset12_hi = offset & ~kOffset12Mask;  // signed
+    uint32_t offset12_lo = offset & kOffset12Mask;  // unsigned
+    AddConstant(rd, CP, offset12_hi);
+    ldr(rd, Address(rd, offset12_lo));
+  }
 }
 
 
 void Assembler::Bind(Label* label) {
   ASSERT(!label->IsBound());
   int bound_pc = buffer_.Size();
   while (label->IsLinked()) {
     int32_t position = label->Position();
     int32_t next = buffer_.Load<int32_t>(position);
     int32_t encoded = Assembler::EncodeBranchOffset(bound_pc - position, next);
@@ skipping 98 matching lines @@
   mov(rd, ShifterOperand(rm, ROR, shift_imm), cond);
 }
 
 
 void Assembler::Rrx(Register rd, Register rm, Condition cond) {
   mov(rd, ShifterOperand(rm, ROR, 0), cond);
 }
 
 
 void Assembler::Branch(const ExternalLabel* label) {
-  // TODO(regis): Revisit this code sequence.
   LoadImmediate(IP, label->address());  // Target address is never patched.
   mov(PC, ShifterOperand(IP));
 }
 
 
 void Assembler::BranchLink(const ExternalLabel* label) {
-  // TODO(regis): Revisit this code sequence.
-  // Make sure that CodePatcher is able to patch this code sequence.
+  // TODO(regis): Make sure that CodePatcher is able to patch the label referred
+  // to by this code sequence.
   // For added code robustness, use 'blx lr' in a patchable sequence and
   // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors).
-  ldr(LR, Address(PC));
-  Label skip;
-  b(&skip);
-  Emit(label->address());  // May get patched.
-  Bind(&skip);
+  const int32_t offset =
+      Array::data_offset() + 4*AddExternalLabel(label) - kHeapObjectTag;
+  if (Address::CanHoldLoadOffset(kLoadWord, offset)) {
+    ldr(LR, Address(CP, offset));
+  } else {
+    int32_t offset12_hi = offset & ~kOffset12Mask;  // signed
+    uint32_t offset12_lo = offset & kOffset12Mask;  // unsigned
+    // Inline a simplified version of AddConstant(LR, CP, offset12_hi).
+    ShifterOperand shifter_op;
+    if (ShifterOperand::CanHold(offset12_hi, &shifter_op)) {
+      add(LR, CP, shifter_op);
+    } else {
+      movw(LR, Utils::Low16Bits(offset12_hi));
+      const uint16_t value_high = Utils::High16Bits(offset12_hi);
+      if (value_high != 0) {
+        movt(LR, value_high);
+      }
+      add(LR, CP, ShifterOperand(LR));
+    }
+    ldr(LR, Address(LR, offset12_lo));
+  }
   blx(LR);  // Use blx instruction so that the return branch prediction works.
 }
 
 
 void Assembler::BranchLinkStore(const ExternalLabel* label, Address ad) {
   // TODO(regis): Revisit this code sequence.
   LoadImmediate(IP, label->address());  // Target address is never patched.
   str(PC, ad);
   blx(IP);  // Use blx instruction so that the return branch prediction works.
 }
@@ skipping 319 matching lines @@
   offset &= kBranchOffsetMask;
   return (inst & ~kBranchOffsetMask) | offset;
 }
 
 
 int Assembler::DecodeBranchOffset(int32_t inst) {
   // Sign-extend, left-shift by 2, then add 8.
   return ((((inst & kBranchOffsetMask) << 8) >> 6) + 8);
 }
 
+
+int32_t Assembler::AddObject(const Object& obj) {
+  for (int i = 0; i < object_pool_.Length(); i++) {
+    if (object_pool_.At(i) == obj.raw()) {
+      return i;
+    }
+  }
+  object_pool_.Add(obj);
+  return object_pool_.Length();
+}
+
+
+int32_t Assembler::AddExternalLabel(const ExternalLabel* label) {
+  const uword address = label->address();
+  ASSERT(Utils::IsAligned(address, 4));
+  // The address is stored in the object array as a RawSmi.
+  const Smi& smi = Smi::Handle(Smi::New(address >> kSmiTagShift));
+  // Do not reuse an existing entry, since each reference may be patched
+  // independently.
+  object_pool_.Add(smi);
+  return object_pool_.Length();
+}
+
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM