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| 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// | 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 309 }; | 309 }; |
| 310 | 310 |
| 311 /// A predicable ARM instruction. | 311 /// A predicable ARM instruction. |
| 312 class InstARM32Pred : public InstARM32 { | 312 class InstARM32Pred : public InstARM32 { |
| 313 InstARM32Pred() = delete; | 313 InstARM32Pred() = delete; |
| 314 InstARM32Pred(const InstARM32Pred &) = delete; | 314 InstARM32Pred(const InstARM32Pred &) = delete; |
| 315 InstARM32Pred &operator=(const InstARM32Pred &) = delete; | 315 InstARM32Pred &operator=(const InstARM32Pred &) = delete; |
| 316 | 316 |
| 317 public: | 317 public: |
| 318 InstARM32Pred(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest, | 318 InstARM32Pred(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest, |
| 319 CondARM32::Cond Predicate) | 319 CondARM32::Cond MyPredicate) |
| 320 : InstARM32(Func, Kind, Maxsrcs, Dest), Predicate(Predicate) {} | 320 : InstARM32(Func, Kind, Maxsrcs, Dest), Predicate(MyPredicate) {} |
| 321 | 321 |
| 322 CondARM32::Cond getPredicate() const { return Predicate; } | 322 CondARM32::Cond getPredicate() const { return Predicate; } |
| 323 void setPredicate(CondARM32::Cond Pred) { Predicate = Pred; } | 323 void setPredicate(CondARM32::Cond Pred) { Predicate = Pred; } |
| 324 | 324 |
| 325 static const char *predString(CondARM32::Cond Predicate); | 325 static const char *predString(CondARM32::Cond Predicate); |
| 326 void dumpOpcodePred(Ostream &Str, const char *Opcode, Type Ty) const; | 326 void dumpOpcodePred(Ostream &Str, const char *Opcode, Type Ty) const; |
| 327 | 327 |
| 328 /// Shared emit routines for common forms of instructions. | 328 /// Shared emit routines for common forms of instructions. |
| 329 static void emitUnaryopGPR(const char *Opcode, const InstARM32Pred *Inst, | 329 static void emitUnaryopGPR(const char *Opcode, const InstARM32Pred *Inst, |
| 330 const Cfg *Func, bool NeedsWidthSuffix); | 330 const Cfg *Func, bool NeedsWidthSuffix); |
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| 513 dumpDest(Func); | 513 dumpDest(Func); |
| 514 Str << " = "; | 514 Str << " = "; |
| 515 dumpOpcodePred(Str, Opcode, getDest()->getType()); | 515 dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 516 Str << (SetFlags ? ".s " : " "); | 516 Str << (SetFlags ? ".s " : " "); |
| 517 dumpSources(Func); | 517 dumpSources(Func); |
| 518 } | 518 } |
| 519 static bool classof(const Inst *Inst) { return isClassof(Inst, K); } | 519 static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 520 | 520 |
| 521 private: | 521 private: |
| 522 InstARM32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, | 522 InstARM32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, |
| 523 Operand *Src1, CondARM32::Cond Predicate, bool SetFlags) | 523 Operand *Src1, CondARM32::Cond Predicate, |
| 524 : InstARM32Pred(Func, K, 2, Dest, Predicate), SetFlags(SetFlags) { | 524 bool MySetFlags) |
| 525 : InstARM32Pred(Func, K, 2, Dest, Predicate), SetFlags(MySetFlags) { |
| 525 addSource(Src0); | 526 addSource(Src0); |
| 526 addSource(Src1); | 527 addSource(Src1); |
| 527 } | 528 } |
| 528 | 529 |
| 529 static const char *Opcode; | 530 static const char *Opcode; |
| 530 bool SetFlags; | 531 bool SetFlags; |
| 531 }; | 532 }; |
| 532 | 533 |
| 533 // Instructions of the form x := a op1 (y op2 z). E.g., multiply accumulate. | 534 // Instructions of the form x := a op1 (y op2 z). E.g., multiply accumulate. |
| 534 template <InstARM32::InstKindARM32 K> | 535 template <InstARM32::InstKindARM32 K> |
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| 972 // Declare partial template specializations of emit() methods that | 973 // Declare partial template specializations of emit() methods that |
| 973 // already have default implementations. Without this, there is the | 974 // already have default implementations. Without this, there is the |
| 974 // possibility of ODR violations and link errors. | 975 // possibility of ODR violations and link errors. |
| 975 | 976 |
| 976 template <> void InstARM32Movw::emit(const Cfg *Func) const; | 977 template <> void InstARM32Movw::emit(const Cfg *Func) const; |
| 977 template <> void InstARM32Movt::emit(const Cfg *Func) const; | 978 template <> void InstARM32Movt::emit(const Cfg *Func) const; |
| 978 | 979 |
| 979 } // end of namespace Ice | 980 } // end of namespace Ice |
| 980 | 981 |
| 981 #endif // SUBZERO_SRC_ICEINSTARM32_H | 982 #endif // SUBZERO_SRC_ICEINSTARM32_H |
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