| Index: src/IceRegistersX8632.h
|
| diff --git a/src/IceRegistersX8632.h b/src/IceRegistersX8632.h
|
| index 86ace82533abdd46c013f7c8c214f584862084b5..fd60f5392e7a35f146c5340e95dbad1b707a9f04 100644
|
| --- a/src/IceRegistersX8632.h
|
| +++ b/src/IceRegistersX8632.h
|
| @@ -6,9 +6,10 @@
|
| // License. See LICENSE.TXT for details.
|
| //
|
| //===----------------------------------------------------------------------===//
|
| -//
|
| -// This file declares the registers and their encodings for x86-32.
|
| -//
|
| +///
|
| +/// \file
|
| +/// This file declares the registers and their encodings for x86-32.
|
| +///
|
| //===----------------------------------------------------------------------===//
|
|
|
| #ifndef SUBZERO_SRC_ICEREGISTERSX8632_H
|
| @@ -22,8 +23,8 @@ namespace Ice {
|
|
|
| namespace RegX8632 {
|
|
|
| -// An enum of every register. The enum value may not match the encoding
|
| -// used to binary encode register operands in instructions.
|
| +/// An enum of every register. The enum value may not match the encoding
|
| +/// used to binary encode register operands in instructions.
|
| enum AllRegisters {
|
| #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
|
| frameptr, isI8, isInt, isFP) \
|
| @@ -36,8 +37,8 @@ enum AllRegisters {
|
| #undef X
|
| };
|
|
|
| -// An enum of GPR Registers. The enum value does match the encoding used
|
| -// to binary encode register operands in instructions.
|
| +/// An enum of GPR Registers. The enum value does match the encoding used
|
| +/// to binary encode register operands in instructions.
|
| enum GPRRegister {
|
| #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
|
| frameptr, isI8, isInt, isFP) \
|
| @@ -47,8 +48,8 @@ enum GPRRegister {
|
| Encoded_Not_GPR = -1
|
| };
|
|
|
| -// An enum of XMM Registers. The enum value does match the encoding used
|
| -// to binary encode register operands in instructions.
|
| +/// An enum of XMM Registers. The enum value does match the encoding used
|
| +/// to binary encode register operands in instructions.
|
| enum XmmRegister {
|
| #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
|
| frameptr, isI8, isInt, isFP) \
|
| @@ -58,8 +59,8 @@ enum XmmRegister {
|
| Encoded_Not_Xmm = -1
|
| };
|
|
|
| -// An enum of Byte Registers. The enum value does match the encoding used
|
| -// to binary encode register operands in instructions.
|
| +/// An enum of Byte Registers. The enum value does match the encoding used
|
| +/// to binary encode register operands in instructions.
|
| enum ByteRegister {
|
| #define X(val, encode) Encoded_##val encode,
|
| REGX8632_BYTEREG_TABLE
|
| @@ -67,8 +68,8 @@ enum ByteRegister {
|
| Encoded_Not_ByteReg = -1
|
| };
|
|
|
| -// An enum of X87 Stack Registers. The enum value does match the encoding used
|
| -// to binary encode register operands in instructions.
|
| +/// An enum of X87 Stack Registers. The enum value does match the encoding used
|
| +/// to binary encode register operands in instructions.
|
| enum X87STRegister {
|
| #define X(val, encode, name) Encoded_##val encode,
|
| X87ST_REGX8632_TABLE
|
|
|