Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(121)

Side by Side Diff: src/IceRegistersARM32.h

Issue 1216963007: Doxygenize the documentation comments (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Rebase to master Created 5 years, 5 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceRegAlloc.cpp ('k') | src/IceRegistersMIPS32.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===// 1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 ///
10 // This file declares the registers and their encodings for ARM32. 10 /// \file
11 // 11 /// This file declares the registers and their encodings for ARM32.
12 ///
12 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===//
13 14
14 #ifndef SUBZERO_SRC_ICEREGISTERSARM32_H 15 #ifndef SUBZERO_SRC_ICEREGISTERSARM32_H
15 #define SUBZERO_SRC_ICEREGISTERSARM32_H 16 #define SUBZERO_SRC_ICEREGISTERSARM32_H
16 17
17 #include "IceDefs.h" 18 #include "IceDefs.h"
18 #include "IceInstARM32.def" 19 #include "IceInstARM32.def"
19 #include "IceTypes.h" 20 #include "IceTypes.h"
20 21
21 namespace Ice { 22 namespace Ice {
22 23
23 namespace RegARM32 { 24 namespace RegARM32 {
24 25
25 // An enum of every register. The enum value may not match the encoding 26 /// An enum of every register. The enum value may not match the encoding
26 // used to binary encode register operands in instructions. 27 /// used to binary encode register operands in instructions.
27 enum AllRegisters { 28 enum AllRegisters {
28 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ 29 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
29 isFP) \ 30 isFP) \
30 val, 31 val,
31 REGARM32_TABLE 32 REGARM32_TABLE
32 #undef X 33 #undef X
33 Reg_NUM, 34 Reg_NUM,
34 #define X(val, init) val init, 35 #define X(val, init) val init,
35 REGARM32_TABLE_BOUNDS 36 REGARM32_TABLE_BOUNDS
36 #undef X 37 #undef X
37 }; 38 };
38 39
39 // An enum of GPR Registers. The enum value does match the encoding used 40 /// An enum of GPR Registers. The enum value does match the encoding used
40 // to binary encode register operands in instructions. 41 /// to binary encode register operands in instructions.
41 enum GPRRegister { 42 enum GPRRegister {
42 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ 43 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
43 isFP) \ 44 isFP) \
44 Encoded_##val encode, 45 Encoded_##val encode,
45 REGARM32_GPR_TABLE 46 REGARM32_GPR_TABLE
46 #undef X 47 #undef X
47 Encoded_Not_GPR = -1 48 Encoded_Not_GPR = -1
48 }; 49 };
49 50
50 // TODO(jvoung): Floating point and vector registers... 51 // TODO(jvoung): Floating point and vector registers...
51 // Need to model overlap and difference in encoding too. 52 // Need to model overlap and difference in encoding too.
52 53
53 static inline GPRRegister getEncodedGPR(int32_t RegNum) { 54 static inline GPRRegister getEncodedGPR(int32_t RegNum) {
54 assert(Reg_GPR_First <= RegNum && RegNum <= Reg_GPR_Last); 55 assert(Reg_GPR_First <= RegNum && RegNum <= Reg_GPR_Last);
55 return GPRRegister(RegNum - Reg_GPR_First); 56 return GPRRegister(RegNum - Reg_GPR_First);
56 } 57 }
57 58
58 } // end of namespace RegARM32 59 } // end of namespace RegARM32
59 60
60 } // end of namespace Ice 61 } // end of namespace Ice
61 62
62 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H 63 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H
OLDNEW
« no previous file with comments | « src/IceRegAlloc.cpp ('k') | src/IceRegistersMIPS32.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698