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src/IceAssemblerX8632.h

 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ------*- C++ -*-===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
-//
-// This file implements the Assembler class for x86-32.
-//
+///
+/// \file
+/// This file implements the Assembler class for x86-32.
+///
 //===----------------------------------------------------------------------===//
 
 #ifndef SUBZERO_SRC_ICEASSEMBLERX8632_H
 #define SUBZERO_SRC_ICEASSEMBLERX8632_H
 
 #include "IceAssembler.h"
 #include "IceConditionCodesX8632.h"
 #include "IceDefs.h"
 #include "IceOperand.h"
 #include "IceRegistersX8632.h"
@@ skipping 119 matching lines @@
 
   void SetFixup(AssemblerFixup *fixup) { fixup_ = fixup; }
 
 private:
   uint8_t length_;
   uint8_t encoding_[6];
   AssemblerFixup *fixup_;
 
   explicit Operand(GPRRegister reg) : fixup_(nullptr) { SetModRM(3, reg); }
 
-  // Get the operand encoding byte at the given index.
+  /// Get the operand encoding byte at the given index.
   uint8_t encoding_at(intptr_t index) const {
     assert(index >= 0 && index < length_);
     return encoding_[index];
   }
 
-  // Returns whether or not this operand is really the given register in
-  // disguise. Used from the assembler to generate better encodings.
+  /// Returns whether or not this operand is really the given register in
+  /// disguise. Used from the assembler to generate better encodings.
   bool IsRegister(GPRRegister reg) const {
     return ((encoding_[0] & 0xF8) == 0xC0) // Addressing mode is register only.
            && ((encoding_[0] & 0x07) == reg); // Register codes match.
   }
 
   friend class AssemblerX8632;
 };
 
 class Address : public Operand {
 public:
@@ skipping 86 matching lines @@
 
   void FinalCheck() const {
     // Assert if label is being destroyed with unresolved branches pending.
     assert(!IsLinked());
     assert(!HasNear());
   }
 
   // TODO(jvoung): why are labels offset by this?
   static const uint32_t kWordSize = sizeof(uint32_t);
 
-  // Returns the position for bound labels (branches that come after this
-  // are considered backward branches). Cannot be used for unused or linked
-  // labels.
+  /// Returns the position for bound labels (branches that come after this
+  /// are considered backward branches). Cannot be used for unused or linked
+  /// labels.
   intptr_t Position() const {
     assert(IsBound());
     return -position_ - kWordSize;
   }
 
-  // Returns the position of an earlier branch instruction that was linked
-  // to this label (branches that use this are considered forward branches).
-  // The linked instructions form a linked list, of sorts, using the
-  // instruction's displacement field for the location of the next
-  // instruction that is also linked to this label.
+  /// Returns the position of an earlier branch instruction that was linked
+  /// to this label (branches that use this are considered forward branches).
+  /// The linked instructions form a linked list, of sorts, using the
+  /// instruction's displacement field for the location of the next
+  /// instruction that is also linked to this label.
   intptr_t LinkPosition() const {
     assert(IsLinked());
     return position_ - kWordSize;
   }
 
-  // Returns the position of an earlier branch instruction which
-  // assumes that this label is "near", and bumps iterator to the
-  // next near position.
+  /// Returns the position of an earlier branch instruction which
+  /// assumes that this label is "near", and bumps iterator to the
+  /// next near position.
   intptr_t NearPosition() {
     assert(HasNear());
     return unresolved_near_positions_[--num_unresolved_];
   }
 
   bool IsBound() const { return position_ < 0; }
   bool IsLinked() const { return position_ > 0; }
   bool IsUnused() const { return (position_ == 0) && (num_unresolved_ == 0); }
   bool HasNear() const { return num_unresolved_ != 0; }
 
@@ skipping 71 matching lines @@
 
   bool fixupIsPCRel(FixupKind Kind) const override {
     // Currently assuming this is the only PC-rel relocation type used.
     return Kind == llvm::ELF::R_386_PC32;
   }
 
   static bool classof(const Assembler *Asm) {
     return Asm->getKind() == Asm_X8632;
   }
 
-  // Operations to emit GPR instructions (and dispatch on operand type).
+  /// Operations to emit GPR instructions (and dispatch on operand type).
   typedef void (AssemblerX8632::*TypedEmitGPR)(Type, GPRRegister);
   typedef void (AssemblerX8632::*TypedEmitAddr)(Type, const Address &);
   struct GPREmitterOneOp {
     TypedEmitGPR Reg;
     TypedEmitAddr Addr;
   };
 
   typedef void (AssemblerX8632::*TypedEmitGPRGPR)(Type, GPRRegister,
                                                   GPRRegister);
   typedef void (AssemblerX8632::*TypedEmitGPRAddr)(Type, GPRRegister,
@@ skipping 25 matching lines @@
 
   typedef void (AssemblerX8632::*TypedEmitAddrGPR)(Type, const Address &,
                                                    GPRRegister);
   typedef void (AssemblerX8632::*TypedEmitAddrImm)(Type, const Address &,
                                                    const Immediate &);
   struct GPREmitterAddrOp {
     TypedEmitAddrGPR AddrGPR;
     TypedEmitAddrImm AddrImm;
   };
 
-  // Operations to emit XMM instructions (and dispatch on operand type).
+  /// Operations to emit XMM instructions (and dispatch on operand type).
   typedef void (AssemblerX8632::*TypedEmitXmmXmm)(Type, XmmRegister,
                                                   XmmRegister);
   typedef void (AssemblerX8632::*TypedEmitXmmAddr)(Type, XmmRegister,
                                                    const Address &);
   struct XmmEmitterRegOp {
     TypedEmitXmmXmm XmmXmm;
     TypedEmitXmmAddr XmmAddr;
   };
 
   typedef void (AssemblerX8632::*EmitXmmXmm)(XmmRegister, XmmRegister);
   typedef void (AssemblerX8632::*EmitXmmAddr)(XmmRegister, const Address &);
   typedef void (AssemblerX8632::*EmitAddrXmm)(const Address &, XmmRegister);
   struct XmmEmitterMovOps {
     EmitXmmXmm XmmXmm;
     EmitXmmAddr XmmAddr;
     EmitAddrXmm AddrXmm;
   };
 
   typedef void (AssemblerX8632::*TypedEmitXmmImm)(Type, XmmRegister,
                                                   const Immediate &);
 
   struct XmmEmitterShiftOp {
     TypedEmitXmmXmm XmmXmm;
     TypedEmitXmmAddr XmmAddr;
     TypedEmitXmmImm XmmImm;
   };
 
-  // Cross Xmm/GPR cast instructions.
+  /// Cross Xmm/GPR cast instructions.
   template <typename DReg_t, typename SReg_t> struct CastEmitterRegOp {
     typedef void (AssemblerX8632::*TypedEmitRegs)(Type, DReg_t, SReg_t);
     typedef void (AssemblerX8632::*TypedEmitAddr)(Type, DReg_t,
                                                   const Address &);
 
     TypedEmitRegs RegReg;
     TypedEmitAddr RegAddr;
   };
 
-  // Three operand (potentially) cross Xmm/GPR instructions.
-  // The last operand must be an immediate.
+  /// Three operand (potentially) cross Xmm/GPR instructions.
+  /// The last operand must be an immediate.
   template <typename DReg_t, typename SReg_t> struct ThreeOpImmEmitter {
     typedef void (AssemblerX8632::*TypedEmitRegRegImm)(Type, DReg_t, SReg_t,
                                                        const Immediate &);
     typedef void (AssemblerX8632::*TypedEmitRegAddrImm)(Type, DReg_t,
                                                         const Address &,
                                                         const Immediate &);
 
     TypedEmitRegRegImm RegRegImm;
     TypedEmitRegAddrImm RegAddrImm;
   };
@@ skipping 329 matching lines @@
   void bsr(Type Ty, GPRRegister dst, GPRRegister src);
   void bsr(Type Ty, GPRRegister dst, const Address &src);
 
   void bswap(Type Ty, GPRRegister reg);
 
   void bt(GPRRegister base, GPRRegister offset);
 
   void ret();
   void ret(const Immediate &imm);
 
-  // 'size' indicates size in bytes and must be in the range 1..8.
+  /// 'size' indicates size in bytes and must be in the range 1..8.
   void nop(int size = 1);
   void int3();
   void hlt();
   void ud2();
 
   void j(CondX86::BrCond condition, Label *label, bool near = kFarJump);
   void j(CondX86::BrCond condition, const ConstantRelocatable *label);
 
   void jmp(GPRRegister reg);
   void jmp(Label *label, bool near = kFarJump);
@@ skipping 32 matching lines @@
                    const Immediate &immediate);
   void emitLabel(Label *label, intptr_t instruction_size);
   void emitLabelLink(Label *label);
   void emitNearLabelLink(Label *label);
 
   void emitGenericShift(int rm, Type Ty, GPRRegister reg, const Immediate &imm);
   void emitGenericShift(int rm, Type Ty, const Operand &operand,
                         GPRRegister shifter);
 
   typedef std::vector<Label *> LabelVector;
-  // A vector of pool-allocated x86 labels for CFG nodes.
+  /// A vector of pool-allocated x86 labels for CFG nodes.
   LabelVector CfgNodeLabels;
-  // A vector of pool-allocated x86 labels for Local labels.
+  /// A vector of pool-allocated x86 labels for Local labels.
   LabelVector LocalLabels;
 
   Label *GetOrCreateLabel(SizeT Number, LabelVector &Labels);
 
-  // The arith_int() methods factor out the commonality between the encodings of
-  // add(), Or(), adc(), sbb(), And(), sub(), Xor(), and cmp().  The Tag
-  // parameter is statically asserted to be less than 8.
+  /// The arith_int() methods factor out the commonality between the encodings
+  /// of add(), Or(), adc(), sbb(), And(), sub(), Xor(), and cmp().  The Tag
+  /// parameter is statically asserted to be less than 8.
   template <uint32_t Tag>
   void arith_int(Type Ty, GPRRegister reg, const Immediate &imm);
 
   template <uint32_t Tag>
   void arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1);
 
   template <uint32_t Tag>
   void arith_int(Type Ty, GPRRegister reg, const Address &address);
 
   template <uint32_t Tag>
@@ skipping 27 matching lines @@
 inline void AssemblerX8632::emitFixup(AssemblerFixup *fixup) {
   Buffer.emitFixup(fixup);
 }
 
 inline void AssemblerX8632::emitOperandSizeOverride() { emitUint8(0x66); }
 
 } // end of namespace X8632
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEASSEMBLERX8632_H