Index: src/compiler/arm64/instruction-selector-arm64.cc |
diff --git a/src/compiler/arm64/instruction-selector-arm64.cc b/src/compiler/arm64/instruction-selector-arm64.cc |
index 4be5c8371e70b4416741daae11c3535b2c03c52b..17b8a4b2797728f3d9ef37a5b3bf2f1f519f298b 100644 |
--- a/src/compiler/arm64/instruction-selector-arm64.cc |
+++ b/src/compiler/arm64/instruction-selector-arm64.cc |
@@ -1452,9 +1452,7 @@ void InstructionSelector::VisitTailCall(Node* node) { |
DCHECK_EQ(0, descriptor->flags() & CallDescriptor::kNeedsNopAfterCall); |
// TODO(turbofan): Relax restriction for stack parameters. |
- if (descriptor->UsesOnlyRegisters() && |
- descriptor->HasSameReturnLocationsAs( |
- linkage()->GetIncomingDescriptor())) { |
+ if (linkage()->GetIncomingDescriptor()->CanTailCall(node)) { |
CallBuffer buffer(zone(), descriptor, nullptr); |
// Compute InstructionOperands for inputs and outputs. |
@@ -1463,8 +1461,6 @@ void InstructionSelector::VisitTailCall(Node* node) { |
// heuristics in the register allocator for where to emit constants. |
InitializeCallBuffer(node, &buffer, true, false); |
- DCHECK_EQ(0u, buffer.pushed_nodes.size()); |
- |
// Select the appropriate opcode based on the call type. |
InstructionCode opcode; |
switch (descriptor->kind()) { |