MIPS64: Fix hidden bug in relocations for j and jal.

src/mips64/assembler-mips64.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 463 matching lines @@
     DCHECK((o & 3) == 0);   // Assert the offset is aligned.
     return o >> 2;
   }
   int32_t shifted_branch_offset_compact(Label* L,
       bool jump_elimination_allowed) {
     int32_t o = branch_offset_compact(L, jump_elimination_allowed);
     DCHECK((o & 3) == 0);   // Assert the offset is aligned.
     return o >> 2;
   }
   uint64_t jump_address(Label* L);
+  uint64_t jump_offset(Label* L);
 
   // Puts a labels target address at the given position.
   // The high 8 bits are set to zero.
   void label_at_put(Label* L, int at_offset);
 
   // Read/Modify the code target address in the branch/call instruction at pc.
   static Address target_address_at(Address pc);
   static void set_target_address_at(Address pc,
                                     Address target,
                                     ICacheFlushMode icache_flush_mode =
@@ skipping 232 matching lines @@
   void bnvc(Register rs, Register rt, Label* L) {
     bnvc(rs, rt, branch_offset_compact(L, false)>>2);
   }
 
   // Never use the int16_t b(l)cond version with a branch offset
   // instead of using the Label* version.
 
   // Jump targets must be in the current 256 MB-aligned region. i.e. 28 bits.
   void j(int64_t target);
   void jal(int64_t target);
+  void j(Label* target);
+  void jal(Label* target);
   void jalr(Register rs, Register rd = ra);
   void jr(Register target);
   void jic(Register rt, int16_t offset);
   void jialc(Register rt, int16_t offset);
 
 
   // -------Data-processing-instructions---------
 
   // Arithmetic.
   void addu(Register rd, Register rs, Register rt);
@@ skipping 743 matching lines @@
 class EnsureSpace BASE_EMBEDDED {
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBuffer();
   }
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_ASSEMBLER_MIPS_H_