Move X8632-specific Assembler stuff to Machine Traits.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 10 matching lines @@
 #include "IceInst.h"
 #include "IceRegistersX8632.h"
 #include "IceTargetLoweringX8632.h"
 #include "IceOperand.h"
 
 namespace Ice {
 
 namespace {
 
 const struct InstX8632BrAttributes_ {
-  CondX86::BrCond Opposite;
+  X8632::Traits::Cond::BrCond Opposite;
   const char *DisplayString;
   const char *EmitString;
 } InstX8632BrAttributes[] = {
 #define X(tag, encode, opp, dump, emit)                                        \
-  { CondX86::opp, dump, emit }                                                 \
+  { X8632::Traits::Cond::opp, dump, emit }                                     \
   ,
     ICEINSTX8632BR_TABLE
 #undef X
 };
 
 const struct InstX8632CmppsAttributes_ {
   const char *EmitString;
 } InstX8632CmppsAttributes[] = {
 #define X(tag, emit)                                                           \
   { emit }                                                                     \
@@ skipping 31 matching lines @@
 } // end of anonymous namespace
 
 const char *InstX8632::getWidthString(Type Ty) {
   return TypeX8632Attributes[Ty].WidthString;
 }
 
 const char *InstX8632::getFldString(Type Ty) {
   return TypeX8632Attributes[Ty].FldString;
 }
 
-CondX86::BrCond InstX8632::getOppositeCondition(CondX86::BrCond Cond) {
+X8632::Traits::Cond::BrCond
+InstX8632::getOppositeCondition(X8632::Traits::Cond::BrCond Cond) {
   return InstX8632BrAttributes[Cond].Opposite;
 }
 
 OperandX8632Mem::OperandX8632Mem(Cfg *Func, Type Ty, Variable *Base,
                                  Constant *Offset, Variable *Index,
                                  uint16_t Shift, SegmentRegisters SegmentReg)
     : OperandX8632(kMem, Ty), Base(Base), Offset(Offset), Index(Index),
       Shift(Shift), SegmentReg(SegmentReg), Randomized(false) {
   assert(Shift <= 3);
   Vars = nullptr;
@@ skipping 53 matching lines @@
 InstX8632Label::InstX8632Label(Cfg *Func, TargetX8632 *Target)
     : InstX8632(Func, InstX8632::Label, 0, nullptr),
       Number(Target->makeNextLabelNumber()) {}
 
 IceString InstX8632Label::getName(const Cfg *Func) const {
   return ".L" + Func->getFunctionName() + "$local$__" + std::to_string(Number);
 }
 
 InstX8632Br::InstX8632Br(Cfg *Func, const CfgNode *TargetTrue,
                          const CfgNode *TargetFalse,
-                         const InstX8632Label *Label, CondX86::BrCond Condition)
+                         const InstX8632Label *Label,
+                         X8632::Traits::Cond::BrCond Condition)
     : InstX8632(Func, InstX8632::Br, 0, nullptr), Condition(Condition),
       TargetTrue(TargetTrue), TargetFalse(TargetFalse), Label(Label) {}
 
 bool InstX8632Br::optimizeBranch(const CfgNode *NextNode) {
   // If there is no next block, then there can be no fallthrough to
   // optimize.
   if (NextNode == nullptr)
     return false;
   // Intra-block conditional branches can't be optimized.
   if (Label)
     return false;
   // If there is no fallthrough node, such as a non-default case label
   // for a switch instruction, then there is no opportunity to
   // optimize.
   if (getTargetFalse() == nullptr)
     return false;
 
   // Unconditional branch to the next node can be removed.
-  if (Condition == CondX86::Br_None && getTargetFalse() == NextNode) {
+  if (Condition == X8632::Traits::Cond::Br_None &&
+      getTargetFalse() == NextNode) {
     assert(getTargetTrue() == nullptr);
     setDeleted();
     return true;
   }
   // If the fallthrough is to the next node, set fallthrough to nullptr
   // to indicate.
   if (getTargetFalse() == NextNode) {
     TargetFalse = nullptr;
     return true;
   }
   // If TargetTrue is the next node, and TargetFalse is not nullptr
   // (which was already tested above), then invert the branch
   // condition, swap the targets, and set new fallthrough to nullptr.
   if (getTargetTrue() == NextNode) {
-    assert(Condition != CondX86::Br_None);
+    assert(Condition != X8632::Traits::Cond::Br_None);
     Condition = getOppositeCondition(Condition);
     TargetTrue = getTargetFalse();
     TargetFalse = nullptr;
     return true;
   }
   return false;
 }
 
 bool InstX8632Br::repointEdge(CfgNode *OldNode, CfgNode *NewNode) {
   if (TargetFalse == OldNode) {
@@ skipping 11 matching lines @@
   addSource(Target);
 }
 
 InstX8632Call::InstX8632Call(Cfg *Func, Variable *Dest, Operand *CallTarget)
     : InstX8632(Func, InstX8632::Call, 1, Dest) {
   HasSideEffects = true;
   addSource(CallTarget);
 }
 
 InstX8632Cmov::InstX8632Cmov(Cfg *Func, Variable *Dest, Operand *Source,
-                             CondX86::BrCond Condition)
+                             X8632::Traits::Cond::BrCond Condition)
     : InstX8632(Func, InstX8632::Cmov, 2, Dest), Condition(Condition) {
   // The final result is either the original Dest, or Source, so mark
   // both as sources.
   addSource(Dest);
   addSource(Source);
 }
 
 InstX8632Cmpps::InstX8632Cmpps(Cfg *Func, Variable *Dest, Operand *Source,
-                               CondX86::CmppsCond Condition)
+                               X8632::Traits::Cond::CmppsCond Condition)
     : InstX8632(Func, InstX8632::Cmpps, 2, Dest), Condition(Condition) {
   addSource(Dest);
   addSource(Source);
 }
 
 InstX8632Cmpxchg::InstX8632Cmpxchg(Cfg *Func, Operand *DestOrAddr,
                                    Variable *Eax, Variable *Desired,
                                    bool Locked)
     : InstX8632Lockable(Func, InstX8632::Cmpxchg, 3,
                         llvm::dyn_cast<Variable>(DestOrAddr), Locked) {
@@ skipping 97 matching lines @@
     : InstX8632(Func, InstX8632::Push, 1, nullptr) {
   addSource(Source);
 }
 
 InstX8632Ret::InstX8632Ret(Cfg *Func, Variable *Source)
     : InstX8632(Func, InstX8632::Ret, Source ? 1 : 0, nullptr) {
   if (Source)
     addSource(Source);
 }
 
-InstX8632Setcc::InstX8632Setcc(Cfg *Func, Variable *Dest, CondX86::BrCond Cond)
+InstX8632Setcc::InstX8632Setcc(Cfg *Func, Variable *Dest,
+                               X8632::Traits::Cond::BrCond Cond)
     : InstX8632(Func, InstX8632::Setcc, 0, Dest), Condition(Cond) {}
 
 InstX8632Xadd::InstX8632Xadd(Cfg *Func, Operand *Dest, Variable *Source,
                              bool Locked)
     : InstX8632Lockable(Func, InstX8632::Xadd, 2,
                         llvm::dyn_cast<Variable>(Dest), Locked) {
   addSource(Dest);
   addSource(Source);
 }
 
@@ skipping 44 matching lines @@
   Ostream &Str = Func->getContext()->getStrDump();
   Str << getName(Func) << ":";
 }
 
 void InstX8632Br::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\t";
 
-  if (Condition == CondX86::Br_None) {
+  if (Condition == X8632::Traits::Cond::Br_None) {
     Str << "jmp";
   } else {
     Str << InstX8632BrAttributes[Condition].EmitString;
   }
 
   if (Label) {
     Str << "\t" << Label->getName(Func);
   } else {
-    if (Condition == CondX86::Br_None) {
+    if (Condition == X8632::Traits::Cond::Br_None) {
       Str << "\t" << getTargetFalse()->getAsmName();
     } else {
       Str << "\t" << getTargetTrue()->getAsmName();
       if (getTargetFalse()) {
         Str << "\n\tjmp\t" << getTargetFalse()->getAsmName();
       }
     }
   }
 }
 
 void InstX8632Br::emitIAS(const Cfg *Func) const {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   if (Label) {
     X8632::Label *L = Asm->GetOrCreateLocalLabel(Label->getNumber());
     // In all these cases, local Labels should only be used for Near.
     const bool Near = true;
-    if (Condition == CondX86::Br_None) {
+    if (Condition == X8632::Traits::Cond::Br_None) {
       Asm->jmp(L, Near);
     } else {
       Asm->j(Condition, L, Near);
     }
   } else {
     // Pessimistically assume it's far. This only affects Labels that
     // are not Bound.
     const bool Near = false;
-    if (Condition == CondX86::Br_None) {
+    if (Condition == X8632::Traits::Cond::Br_None) {
       X8632::Label *L =
           Asm->GetOrCreateCfgNodeLabel(getTargetFalse()->getIndex());
       assert(!getTargetTrue());
       Asm->jmp(L, Near);
     } else {
       X8632::Label *L =
           Asm->GetOrCreateCfgNodeLabel(getTargetTrue()->getIndex());
       Asm->j(Condition, L, Near);
       if (getTargetFalse()) {
         X8632::Label *L2 =
             Asm->GetOrCreateCfgNodeLabel(getTargetFalse()->getIndex());
         Asm->jmp(L2, Near);
       }
     }
   }
 }
 
 void InstX8632Br::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "br ";
 
-  if (Condition == CondX86::Br_None) {
+  if (Condition == X8632::Traits::Cond::Br_None) {
     Str << "label %"
         << (Label ? Label->getName(Func) : getTargetFalse()->getName());
     return;
   }
 
   Str << InstX8632BrAttributes[Condition].DisplayString;
   if (Label) {
     Str << ", label %" << Label->getName(Func);
   } else {
     Str << ", label %" << getTargetTrue()->getName();
@@ skipping 139 matching lines @@
 void emitIASOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op,
                     const X8632::AssemblerX8632::GPREmitterOneOp &Emitter) {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   if (const auto Var = llvm::dyn_cast<Variable>(Op)) {
     if (Var->hasReg()) {
       // We cheat a little and use GPRRegister even for byte operations.
       RegX8632::GPRRegister VarReg =
           RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum());
       (Asm->*(Emitter.Reg))(Ty, VarReg);
     } else {
-      X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                   ->stackVarToAsmOperand(Var));
+      X8632::Traits::Address StackAddr(
+          static_cast<TargetX8632 *>(Func->getTarget())
+              ->stackVarToAsmOperand(Var));
       (Asm->*(Emitter.Addr))(Ty, StackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Op)) {
     Mem->emitSegmentOverride(Asm);
     (Asm->*(Emitter.Addr))(Ty, Mem->toAsmAddress(Asm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <bool VarCanBeByte, bool SrcCanBeByte>
 void emitIASRegOpTyGPR(const Cfg *Func, Type Ty, const Variable *Var,
                        const Operand *Src,
                        const X8632::AssemblerX8632::GPREmitterRegOp &Emitter) {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   assert(Var->hasReg());
   // We cheat a little and use GPRRegister even for byte operations.
   RegX8632::GPRRegister VarReg =
       VarCanBeByte ? RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum())
                    : RegX8632::getEncodedGPR(Var->getRegNum());
   if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       RegX8632::GPRRegister SrcReg =
           SrcCanBeByte
               ? RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum())
               : RegX8632::getEncodedGPR(SrcVar->getRegNum());
       (Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
     } else {
-      X8632::Address SrcStackAddr =
+      X8632::Traits::Address SrcStackAddr =
           static_cast<TargetX8632 *>(Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
     Mem->emitSegmentOverride(Asm);
     (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.GPRImm))(Ty, VarReg, X8632::Immediate(Imm->getValue()));
   } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
     AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Reloc);
     (Asm->*(Emitter.GPRImm))(Ty, VarReg,
                              X8632::Immediate(Reloc->getOffset(), Fixup));
   } else if (const auto Split = llvm::dyn_cast<VariableSplit>(Src)) {
     (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Split->toAsmAddress(Func));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void emitIASAddrOpTyGPR(
-    const Cfg *Func, Type Ty, const X8632::Address &Addr, const Operand *Src,
+    const Cfg *Func, Type Ty, const X8632::Traits::Address &Addr,
+    const Operand *Src,
     const X8632::AssemblerX8632::GPREmitterAddrOp &Emitter) {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   // Src can only be Reg or Immediate.
   if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     assert(SrcVar->hasReg());
     RegX8632::GPRRegister SrcReg =
         RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
     (Asm->*(Emitter.AddrGPR))(Ty, Addr, SrcReg);
   } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.AddrImm))(Ty, Addr, X8632::Immediate(Imm->getValue()));
   } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
     AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Reloc);
     (Asm->*(Emitter.AddrImm))(Ty, Addr,
                               X8632::Immediate(Reloc->getOffset(), Fixup));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void emitIASAsAddrOpTyGPR(
     const Cfg *Func, Type Ty, const Operand *Op0, const Operand *Op1,
     const X8632::AssemblerX8632::GPREmitterAddrOp &Emitter) {
   if (const auto Op0Var = llvm::dyn_cast<Variable>(Op0)) {
     assert(!Op0Var->hasReg());
-    X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                 ->stackVarToAsmOperand(Op0Var));
+    X8632::Traits::Address StackAddr(
+        static_cast<TargetX8632 *>(Func->getTarget())
+            ->stackVarToAsmOperand(Op0Var));
     emitIASAddrOpTyGPR(Func, Ty, StackAddr, Op1, Emitter);
   } else if (const auto Op0Mem = llvm::dyn_cast<OperandX8632Mem>(Op0)) {
     X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
     Op0Mem->emitSegmentOverride(Asm);
     emitIASAddrOpTyGPR(Func, Ty, Op0Mem->toAsmAddress(Asm), Op1, Emitter);
   } else if (const auto Split = llvm::dyn_cast<VariableSplit>(Op0)) {
     emitIASAddrOpTyGPR(Func, Ty, Split->toAsmAddress(Func), Op1, Emitter);
   } else {
     llvm_unreachable("Unexpected operand type");
   }
@@ skipping 51 matching lines @@
                      const X8632::AssemblerX8632::XmmEmitterShiftOp &Emitter) {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   assert(Var->hasReg());
   RegX8632::XmmRegister VarReg = RegX8632::getEncodedXmm(Var->getRegNum());
   if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       RegX8632::XmmRegister SrcReg =
           RegX8632::getEncodedXmm(SrcVar->getRegNum());
       (Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
     } else {
-      X8632::Address SrcStackAddr =
+      X8632::Traits::Address SrcStackAddr =
           static_cast<TargetX8632 *>(Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
     assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
     (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.XmmImm))(Ty, VarReg, X8632::Immediate(Imm->getValue()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void emitIASRegOpTyXMM(const Cfg *Func, Type Ty, const Variable *Var,
                        const Operand *Src,
                        const X8632::AssemblerX8632::XmmEmitterRegOp &Emitter) {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   assert(Var->hasReg());
   RegX8632::XmmRegister VarReg = RegX8632::getEncodedXmm(Var->getRegNum());
   if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       RegX8632::XmmRegister SrcReg =
           RegX8632::getEncodedXmm(SrcVar->getRegNum());
       (Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
     } else {
-      X8632::Address SrcStackAddr =
+      X8632::Traits::Address SrcStackAddr =
           static_cast<TargetX8632 *>(Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
     assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
     (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
     (Asm->*(Emitter.XmmAddr))(Ty, VarReg,
-                              X8632::Address::ofConstPool(Asm, Imm));
+                              X8632::Traits::Address::ofConstPool(Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <typename DReg_t, typename SReg_t, DReg_t (*destEnc)(int32_t),
           SReg_t (*srcEnc)(int32_t)>
 void emitIASCastRegOp(
     const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src,
     const X8632::AssemblerX8632::CastEmitterRegOp<DReg_t, SReg_t> Emitter) {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   assert(Dest->hasReg());
   DReg_t DestReg = destEnc(Dest->getRegNum());
   if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
       (Asm->*(Emitter.RegReg))(DispatchTy, DestReg, SrcReg);
     } else {
-      X8632::Address SrcStackAddr =
+      X8632::Traits::Address SrcStackAddr =
           static_cast<TargetX8632 *>(Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.RegAddr))(DispatchTy, DestReg, SrcStackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
     Mem->emitSegmentOverride(Asm);
     (Asm->*(Emitter.RegAddr))(DispatchTy, DestReg, Mem->toAsmAddress(Asm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <typename DReg_t, typename SReg_t, DReg_t (*destEnc)(int32_t),
           SReg_t (*srcEnc)(int32_t)>
 void emitIASThreeOpImmOps(
     const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src0,
     const Operand *Src1,
     const X8632::AssemblerX8632::ThreeOpImmEmitter<DReg_t, SReg_t> Emitter) {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   // This only handles Dest being a register, and Src1 being an immediate.
   assert(Dest->hasReg());
   DReg_t DestReg = destEnc(Dest->getRegNum());
   X8632::Immediate Imm(llvm::cast<ConstantInteger32>(Src1)->getValue());
   if (const auto SrcVar = llvm::dyn_cast<Variable>(Src0)) {
     if (SrcVar->hasReg()) {
       SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
       (Asm->*(Emitter.RegRegImm))(DispatchTy, DestReg, SrcReg, Imm);
     } else {
-      X8632::Address SrcStackAddr =
+      X8632::Traits::Address SrcStackAddr =
           static_cast<TargetX8632 *>(Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.RegAddrImm))(DispatchTy, DestReg, SrcStackAddr, Imm);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src0)) {
     Mem->emitSegmentOverride(Asm);
     (Asm->*(Emitter.RegAddrImm))(DispatchTy, DestReg, Mem->toAsmAddress(Asm),
                                  Imm);
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void emitIASMovlikeXMM(const Cfg *Func, const Variable *Dest,
                        const Operand *Src,
                        const X8632::AssemblerX8632::XmmEmitterMovOps Emitter) {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   if (Dest->hasReg()) {
     RegX8632::XmmRegister DestReg = RegX8632::getEncodedXmm(Dest->getRegNum());
     if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
       if (SrcVar->hasReg()) {
         (Asm->*(Emitter.XmmXmm))(DestReg,
                                  RegX8632::getEncodedXmm(SrcVar->getRegNum()));
       } else {
-        X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                     ->stackVarToAsmOperand(SrcVar));
+        X8632::Traits::Address StackAddr(
+            static_cast<TargetX8632 *>(Func->getTarget())
+                ->stackVarToAsmOperand(SrcVar));
         (Asm->*(Emitter.XmmAddr))(DestReg, StackAddr);
       }
     } else if (const auto SrcMem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
       assert(SrcMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
       (Asm->*(Emitter.XmmAddr))(DestReg, SrcMem->toAsmAddress(Asm));
     } else {
       llvm_unreachable("Unexpected operand type");
     }
   } else {
-    X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                 ->stackVarToAsmOperand(Dest));
+    X8632::Traits::Address StackAddr(
+        static_cast<TargetX8632 *>(Func->getTarget())
+            ->stackVarToAsmOperand(Dest));
     // Src must be a register in this case.
     const auto SrcVar = llvm::cast<Variable>(Src);
     assert(SrcVar->hasReg());
     (Asm->*(Emitter.AddrXmm))(StackAddr,
                               RegX8632::getEncodedXmm(SrcVar->getRegNum()));
   }
 }
 
 // In-place ops
 template <> const char *InstX8632Bswap::Opcode = "bswap";
@@ skipping 265 matching lines @@
 
 template <> void InstX8632Pmull::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   char buf[30];
   bool TypesAreValid = getDest()->getType() == IceType_v4i32 ||
                        getDest()->getType() == IceType_v8i16;
   bool InstructionSetIsValid =
       getDest()->getType() == IceType_v8i16 ||
       static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-          TargetX8632::SSE4_1;
+          X8632::Traits::SSE4_1;
   (void)TypesAreValid;
   (void)InstructionSetIsValid;
   assert(TypesAreValid);
   assert(InstructionSetIsValid);
   snprintf(buf, llvm::array_lengthof(buf), "pmull%s",
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Pmull::emitIAS(const Cfg *Func) const {
   Type Ty = getDest()->getType();
   bool TypesAreValid = Ty == IceType_v4i32 || Ty == IceType_v8i16;
   bool InstructionSetIsValid =
       Ty == IceType_v8i16 ||
       static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-          TargetX8632::SSE4_1;
+          X8632::Traits::SSE4_1;
   (void)TypesAreValid;
   (void)InstructionSetIsValid;
   assert(TypesAreValid);
   assert(InstructionSetIsValid);
   assert(getSrcSize() == 2);
   Type ElementTy = typeElementType(Ty);
   emitIASRegOpTyXMM(Func, ElementTy, getDest(), getSrc(1), Emitter);
 }
 
 template <> void InstX8632Subss::emit(const Cfg *Func) const {
@@ skipping 105 matching lines @@
   const Operand *Src = Inst->getSrc(1);
   emitIASRegOpTyXMM(Func, Dest->getType(), Dest, Src, Emitter);
 }
 
 } // end anonymous namespace
 
 template <> void InstX8632Blendvps::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-         TargetX8632::SSE4_1);
+         X8632::Traits::SSE4_1);
   emitVariableBlendInst(Opcode, this, Func);
 }
 
 template <> void InstX8632Blendvps::emitIAS(const Cfg *Func) const {
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-         TargetX8632::SSE4_1);
+         X8632::Traits::SSE4_1);
   static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter = {
       &X8632::AssemblerX8632::blendvps, &X8632::AssemblerX8632::blendvps};
   emitIASVariableBlendInst(this, Func, Emitter);
 }
 
 template <> void InstX8632Pblendvb::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-         TargetX8632::SSE4_1);
+         X8632::Traits::SSE4_1);
   emitVariableBlendInst(Opcode, this, Func);
 }
 
 template <> void InstX8632Pblendvb::emitIAS(const Cfg *Func) const {
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-         TargetX8632::SSE4_1);
+         X8632::Traits::SSE4_1);
   static const X8632::AssemblerX8632::XmmEmitterRegOp Emitter = {
       &X8632::AssemblerX8632::pblendvb, &X8632::AssemblerX8632::pblendvb};
   emitIASVariableBlendInst(this, Func, Emitter);
 }
 
 template <> void InstX8632Imul::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
@@ skipping 37 matching lines @@
     const X8632::AssemblerX8632::GPREmitterRegOp Emitter = {
         &X8632::AssemblerX8632::imul, &X8632::AssemblerX8632::imul,
         &X8632::AssemblerX8632::imul};
     emitIASRegOpTyGPR(Func, Ty, Var, Src, Emitter);
   }
 }
 
 template <> void InstX8632Insertps::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-         TargetX8632::SSE4_1);
+         X8632::Traits::SSE4_1);
   const Variable *Dest = getDest();
   assert(Dest == getSrc(0));
   Type Ty = Dest->getType();
   static const X8632::AssemblerX8632::ThreeOpImmEmitter<
       RegX8632::XmmRegister, RegX8632::XmmRegister> Emitter = {
       &X8632::AssemblerX8632::insertps, &X8632::AssemblerX8632::insertps};
   emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::XmmRegister,
                        RegX8632::getEncodedXmm, RegX8632::getEncodedXmm>(
       Func, Ty, Dest, getSrc(1), getSrc(2), Emitter);
 }
@@ skipping 164 matching lines @@
   Str << " = shrd." << getDest()->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Cmov::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
   Str << "\t";
-  assert(Condition != CondX86::Br_None);
+  assert(Condition != X8632::Traits::Cond::Br_None);
   assert(getDest()->hasReg());
   Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString
       << getWidthString(Dest->getType()) << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   Dest->emit(Func);
 }
 
 void InstX8632Cmov::emitIAS(const Cfg *Func) const {
-  assert(Condition != CondX86::Br_None);
+  assert(Condition != X8632::Traits::Cond::Br_None);
   assert(getDest()->hasReg());
   assert(getSrcSize() == 2);
   Operand *Src = getSrc(1);
   Type SrcTy = Src->getType();
   assert(SrcTy == IceType_i16 || SrcTy == IceType_i32);
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       Asm->cmov(SrcTy, Condition,
                 RegX8632::getEncodedGPR(getDest()->getRegNum()),
@@ skipping 22 matching lines @@
   dumpDest(Func);
   Str << ", ";
   dumpSources(Func);
 }
 
 void InstX8632Cmpps::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
-  assert(Condition < CondX86::Cmpps_Invalid);
+  assert(Condition < X8632::Traits::Cond::Cmpps_Invalid);
   Str << "\t";
   Str << "cmp" << InstX8632CmppsAttributes[Condition].EmitString << "ps"
       << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getDest()->emit(Func);
 }
 
 void InstX8632Cmpps::emitIAS(const Cfg *Func) const {
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   assert(getSrcSize() == 2);
-  assert(Condition < CondX86::Cmpps_Invalid);
+  assert(Condition < X8632::Traits::Cond::Cmpps_Invalid);
   // Assuming there isn't any load folding for cmpps, and vector constants
   // are not allowed in PNaCl.
   assert(llvm::isa<Variable>(getSrc(1)));
   const auto SrcVar = llvm::cast<Variable>(getSrc(1));
   if (SrcVar->hasReg()) {
     Asm->cmpps(RegX8632::getEncodedXmm(getDest()->getRegNum()),
                RegX8632::getEncodedXmm(SrcVar->getRegNum()), Condition);
   } else {
-    X8632::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
-                                      ->stackVarToAsmOperand(SrcVar);
+    X8632::Traits::Address SrcStackAddr =
+        static_cast<TargetX8632 *>(Func->getTarget())
+            ->stackVarToAsmOperand(SrcVar);
     Asm->cmpps(RegX8632::getEncodedXmm(getDest()->getRegNum()), SrcStackAddr,
                Condition);
   }
 }
 
 void InstX8632Cmpps::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
-  assert(Condition < CondX86::Cmpps_Invalid);
+  assert(Condition < X8632::Traits::Cond::Cmpps_Invalid);
   dumpDest(Func);
   Str << " = cmp" << InstX8632CmppsAttributes[Condition].EmitString << "ps"
       << "\t";
   dumpSources(Func);
 }
 
 void InstX8632Cmpxchg::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg" << getWidthString(getSrc(0)->getType()) << "\t";
   getSrc(2)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Cmpxchg::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   Type Ty = getSrc(0)->getType();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
-  const X8632::Address Addr = Mem->toAsmAddress(Asm);
+  const X8632::Traits::Address Addr = Mem->toAsmAddress(Asm);
   const auto VarReg = llvm::cast<Variable>(getSrc(2));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   Asm->cmpxchg(Ty, Addr, Reg, Locked);
 }
 
 void InstX8632Cmpxchg::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
@@ skipping 15 matching lines @@
   }
   Str << "\tcmpxchg8b\t";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 5);
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
-  const X8632::Address Addr = Mem->toAsmAddress(Asm);
+  const X8632::Traits::Address Addr = Mem->toAsmAddress(Asm);
   Asm->cmpxchg8b(Addr, Locked);
 }
 
 void InstX8632Cmpxchg8b::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
@@ skipping 257 matching lines @@
   const Operand *Src = getSrc(0);
   Type DestTy = Dest->getType();
   if (isScalarFloatingType(DestTy)) {
     // Src must be a register, since Dest is a Mem operand of some kind.
     const auto SrcVar = llvm::cast<Variable>(Src);
     assert(SrcVar->hasReg());
     RegX8632::XmmRegister SrcReg = RegX8632::getEncodedXmm(SrcVar->getRegNum());
     X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
     if (const auto DestVar = llvm::dyn_cast<Variable>(Dest)) {
       assert(!DestVar->hasReg());
-      X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                   ->stackVarToAsmOperand(DestVar));
+      X8632::Traits::Address StackAddr(
+          static_cast<TargetX8632 *>(Func->getTarget())
+              ->stackVarToAsmOperand(DestVar));
       Asm->movss(DestTy, StackAddr, SrcReg);
     } else {
       const auto DestMem = llvm::cast<OperandX8632Mem>(Dest);
       assert(DestMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
       Asm->movss(DestTy, DestMem->toAsmAddress(Asm), SrcReg);
     }
     return;
   } else {
     assert(isScalarIntegerType(DestTy));
     static const X8632::AssemblerX8632::GPREmitterAddrOp GPRAddrEmitter = {
@@ skipping 168 matching lines @@
       // when both Src and Dest are integer types.
       if (isScalarIntegerType(SrcTy)) {
         DestTy = SrcTy;
       }
       emitIASRegOpTyGPR(Func, DestTy, Dest, Src, GPRRegEmitter);
       return;
     }
   } else {
     // Dest must be Stack and Src *could* be a register. Use Src's type
     // to decide on the emitters.
-    X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                 ->stackVarToAsmOperand(Dest));
+    X8632::Traits::Address StackAddr(
+        static_cast<TargetX8632 *>(Func->getTarget())
+            ->stackVarToAsmOperand(Dest));
     if (isScalarFloatingType(SrcTy)) {
       // Src must be a register.
       const auto SrcVar = llvm::cast<Variable>(Src);
       assert(SrcVar->hasReg());
       X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
       Asm->movss(SrcTy, StackAddr,
                  RegX8632::getEncodedXmm(SrcVar->getRegNum()));
       return;
     } else {
       // Src can be a register or immediate.
@@ skipping 12 matching lines @@
   const auto SrcVar = llvm::cast<Variable>(getSrc(0));
   // For insert/extract element (one of Src/Dest is an Xmm vector and
   // the other is an int type).
   if (SrcVar->getType() == IceType_i32) {
     assert(isVectorType(Dest->getType()));
     assert(Dest->hasReg());
     RegX8632::XmmRegister DestReg = RegX8632::getEncodedXmm(Dest->getRegNum());
     if (SrcVar->hasReg()) {
       Asm->movd(DestReg, RegX8632::getEncodedGPR(SrcVar->getRegNum()));
     } else {
-      X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                   ->stackVarToAsmOperand(SrcVar));
+      X8632::Traits::Address StackAddr(
+          static_cast<TargetX8632 *>(Func->getTarget())
+              ->stackVarToAsmOperand(SrcVar));
       Asm->movd(DestReg, StackAddr);
     }
   } else {
     assert(isVectorType(SrcVar->getType()));
     assert(SrcVar->hasReg());
     assert(Dest->getType() == IceType_i32);
     RegX8632::XmmRegister SrcReg = RegX8632::getEncodedXmm(SrcVar->getRegNum());
     if (Dest->hasReg()) {
       Asm->movd(RegX8632::getEncodedGPR(Dest->getRegNum()), SrcReg);
     } else {
-      X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                   ->stackVarToAsmOperand(Dest));
+      X8632::Traits::Address StackAddr(
+          static_cast<TargetX8632 *>(Func->getTarget())
+              ->stackVarToAsmOperand(Dest));
       Asm->movd(StackAddr, SrcReg);
     }
   }
 }
 
 template <> void InstX8632Movp::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   // TODO(wala,stichnot): movups works with all vector operands, but
   // there exist other instructions (movaps, movdqa, movdqu) that may
@@ skipping 129 matching lines @@
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   assert(getSrcSize() == 1);
   const Operand *Src = getSrc(0);
   Type Ty = Src->getType();
   if (const auto Var = llvm::dyn_cast<Variable>(Src)) {
     if (Var->hasReg()) {
       // This is a physical xmm register, so we need to spill it to a
       // temporary stack slot.
       X8632::Immediate Width(typeWidthInBytes(Ty));
       Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
-      X8632::Address StackSlot = X8632::Address(RegX8632::Encoded_Reg_esp, 0);
+      X8632::Traits::Address StackSlot =
+          X8632::Traits::Address(RegX8632::Encoded_Reg_esp, 0);
       Asm->movss(Ty, StackSlot, RegX8632::getEncodedXmm(Var->getRegNum()));
       Asm->fld(Ty, StackSlot);
       Asm->add(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
     } else {
-      X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                   ->stackVarToAsmOperand(Var));
+      X8632::Traits::Address StackAddr(
+          static_cast<TargetX8632 *>(Func->getTarget())
+              ->stackVarToAsmOperand(Var));
       Asm->fld(Ty, StackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
     assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
     Asm->fld(Ty, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
-    Asm->fld(Ty, X8632::Address::ofConstPool(Asm, Imm));
+    Asm->fld(Ty, X8632::Traits::Address::ofConstPool(Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void InstX8632Fld::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "fld." << getSrc(0)->getType() << " ";
@@ skipping 41 matching lines @@
   // TODO(jvoung,stichnot): Utilize this by setting Dest to nullptr to
   // "partially" delete the fstp if the Dest is unused.
   // Even if Dest is unused, the fstp should be kept for the SideEffects
   // of popping the stack.
   if (!Dest) {
     Asm->fstp(RegX8632::getEncodedSTReg(0));
     return;
   }
   Type Ty = Dest->getType();
   if (!Dest->hasReg()) {
-    X8632::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                                 ->stackVarToAsmOperand(Dest));
+    X8632::Traits::Address StackAddr(
+        static_cast<TargetX8632 *>(Func->getTarget())
+            ->stackVarToAsmOperand(Dest));
     Asm->fstp(Ty, StackAddr);
   } else {
     // Dest is a physical (xmm) register, so st(0) needs to go through
     // memory.  Hack this by creating a temporary stack slot, spilling
     // st(0) there, loading it into the xmm register, and deallocating
     // the stack slot.
     X8632::Immediate Width(typeWidthInBytes(Ty));
     Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
-    X8632::Address StackSlot = X8632::Address(RegX8632::Encoded_Reg_esp, 0);
+    X8632::Traits::Address StackSlot =
+        X8632::Traits::Address(RegX8632::Encoded_Reg_esp, 0);
     Asm->fstp(Ty, StackSlot);
     Asm->movss(Ty, RegX8632::getEncodedXmm(Dest->getRegNum()), StackSlot);
     Asm->add(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
   }
 }
 
 void InstX8632Fstp::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
@@ skipping 21 matching lines @@
 
 template <> void InstX8632Pextr::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   // pextrb and pextrd are SSE4.1 instructions.
   assert(getSrc(0)->getType() == IceType_v8i16 ||
          getSrc(0)->getType() == IceType_v8i1 ||
          static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-             TargetX8632::SSE4_1);
+             X8632::Traits::SSE4_1);
   Str << "\t" << Opcode << TypeX8632Attributes[getSrc(0)->getType()].PackString
       << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << ", ";
   Variable *Dest = getDest();
   // pextrw must take a register dest. There is an SSE4.1 version that takes
   // a memory dest, but we aren't using it. For uniformity, just restrict
   // them all to have a register dest for now.
   assert(Dest->hasReg());
   Dest->asType(IceType_i32)->emit(Func);
 }
 
 template <> void InstX8632Pextr::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   // pextrb and pextrd are SSE4.1 instructions.
   const Variable *Dest = getDest();
   Type DispatchTy = Dest->getType();
   assert(DispatchTy == IceType_i16 ||
          static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-             TargetX8632::SSE4_1);
+             X8632::Traits::SSE4_1);
   // pextrw must take a register dest. There is an SSE4.1 version that takes
   // a memory dest, but we aren't using it. For uniformity, just restrict
   // them all to have a register dest for now.
   assert(Dest->hasReg());
   // pextrw's Src(0) must be a register (both SSE4.1 and SSE2).
   assert(llvm::cast<Variable>(getSrc(0))->hasReg());
   static const X8632::AssemblerX8632::ThreeOpImmEmitter<
       RegX8632::GPRRegister, RegX8632::XmmRegister> Emitter = {
       &X8632::AssemblerX8632::pextr, nullptr};
   emitIASThreeOpImmOps<RegX8632::GPRRegister, RegX8632::XmmRegister,
                        RegX8632::getEncodedGPR, RegX8632::getEncodedXmm>(
       Func, DispatchTy, Dest, getSrc(0), getSrc(1), Emitter);
 }
 
 template <> void InstX8632Pinsr::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   // pinsrb and pinsrd are SSE4.1 instructions.
   assert(getDest()->getType() == IceType_v8i16 ||
          getDest()->getType() == IceType_v8i1 ||
          static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-             TargetX8632::SSE4_1);
+             X8632::Traits::SSE4_1);
   Str << "\t" << Opcode << TypeX8632Attributes[getDest()->getType()].PackString
       << "\t";
   getSrc(2)->emit(Func);
   Str << ", ";
   Operand *Src1 = getSrc(1);
   if (const auto Src1Var = llvm::dyn_cast<Variable>(Src1)) {
     // If src1 is a register, it should always be r32.
     if (Src1Var->hasReg()) {
       Src1Var->asType(IceType_i32)->emit(Func);
     } else {
       Src1Var->emit(Func);
     }
   } else {
     Src1->emit(Func);
   }
   Str << ", ";
   getDest()->emit(Func);
 }
 
 template <> void InstX8632Pinsr::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   assert(getDest() == getSrc(0));
   // pinsrb and pinsrd are SSE4.1 instructions.
   const Operand *Src0 = getSrc(1);
   Type DispatchTy = Src0->getType();
   assert(DispatchTy == IceType_i16 ||
          static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
-             TargetX8632::SSE4_1);
+             X8632::Traits::SSE4_1);
   // If src1 is a register, it should always be r32 (this should fall out
   // from the encodings for ByteRegs overlapping the encodings for r32),
   // but we have to trust the regalloc to not choose "ah", where it
   // doesn't overlap.
   static const X8632::AssemblerX8632::ThreeOpImmEmitter<
       RegX8632::XmmRegister, RegX8632::GPRRegister> Emitter = {
       &X8632::AssemblerX8632::pinsr, &X8632::AssemblerX8632::pinsr};
   emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::GPRRegister,
                        RegX8632::getEncodedXmm, RegX8632::getEncodedGPR>(
       Func, DispatchTy, getDest(), Src0, getSrc(2), Emitter);
@@ skipping 160 matching lines @@
 
 void InstX8632Setcc::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\tset" << InstX8632BrAttributes[Condition].DisplayString << "\t";
   Dest->emit(Func);
 }
 
 void InstX8632Setcc::emitIAS(const Cfg *Func) const {
-  assert(Condition != CondX86::Br_None);
+  assert(Condition != X8632::Traits::Cond::Br_None);
   assert(getDest()->getType() == IceType_i1);
   assert(getSrcSize() == 0);
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   if (getDest()->hasReg())
     Asm->setcc(Condition, RegX8632::getEncodedByteReg(getDest()->getRegNum()));
   else
     Asm->setcc(Condition, static_cast<TargetX8632 *>(Func->getTarget())
                               ->stackVarToAsmOperand(getDest()));
   return;
 }
@@ skipping 18 matching lines @@
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Xadd::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   Type Ty = getSrc(0)->getType();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
-  const X8632::Address Addr = Mem->toAsmAddress(Asm);
+  const X8632::Traits::Address Addr = Mem->toAsmAddress(Asm);
   const auto VarReg = llvm::cast<Variable>(getSrc(1));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   Asm->xadd(Ty, Addr, Reg, Locked);
 }
 
 void InstX8632Xadd::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
@@ skipping 15 matching lines @@
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Xchg::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   X8632::AssemblerX8632 *Asm = Func->getAssembler<X8632::AssemblerX8632>();
   Type Ty = getSrc(0)->getType();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
-  const X8632::Address Addr = Mem->toAsmAddress(Asm);
+  const X8632::Traits::Address Addr = Mem->toAsmAddress(Asm);
   const auto VarReg = llvm::cast<Variable>(getSrc(1));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   Asm->xchg(Ty, Addr, Reg);
 }
 
 void InstX8632Xchg::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
@@ skipping 90 matching lines @@
   Str << "]";
 }
 
 void OperandX8632Mem::emitSegmentOverride(X8632::AssemblerX8632 *Asm) const {
   if (SegmentReg != DefaultSegment) {
     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
     Asm->emitSegmentOverride(InstX8632SegmentPrefixes[SegmentReg]);
   }
 }
 
-X8632::Address OperandX8632Mem::toAsmAddress(Assembler *Asm) const {
+X8632::Traits::Address OperandX8632Mem::toAsmAddress(Assembler *Asm) const {
   int32_t Disp = 0;
   AssemblerFixup *Fixup = nullptr;
   // Determine the offset (is it relocatable?)
   if (getOffset()) {
     if (const auto CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) {
       Disp = static_cast<int32_t>(CI->getValue());
     } else if (const auto CR =
                    llvm::dyn_cast<ConstantRelocatable>(getOffset())) {
       Disp = CR->getOffset();
       Fixup = Asm->createFixup(llvm::ELF::R_386_32, CR);
     } else {
       llvm_unreachable("Unexpected offset type");
     }
   }
 
   // Now convert to the various possible forms.
   if (getBase() && getIndex()) {
-    return X8632::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()),
-                          RegX8632::getEncodedGPR(getIndex()->getRegNum()),
-                          X8632::ScaleFactor(getShift()), Disp);
+    return X8632::Traits::Address(
+        RegX8632::getEncodedGPR(getBase()->getRegNum()),
+        RegX8632::getEncodedGPR(getIndex()->getRegNum()),
+        X8632::Traits::ScaleFactor(getShift()), Disp);
   } else if (getBase()) {
-    return X8632::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()),
-                          Disp);
+    return X8632::Traits::Address(
+        RegX8632::getEncodedGPR(getBase()->getRegNum()), Disp);
   } else if (getIndex()) {
-    return X8632::Address(RegX8632::getEncodedGPR(getIndex()->getRegNum()),
-                          X8632::ScaleFactor(getShift()), Disp);
+    return X8632::Traits::Address(
+        RegX8632::getEncodedGPR(getIndex()->getRegNum()),
+        X8632::Traits::ScaleFactor(getShift()), Disp);
   } else if (Fixup) {
-    return X8632::Address::Absolute(Disp, Fixup);
+    return X8632::Traits::Address::Absolute(Disp, Fixup);
   } else {
-    return X8632::Address::Absolute(Disp);
+    return X8632::Traits::Address::Absolute(Disp);
   }
 }
 
-X8632::Address VariableSplit::toAsmAddress(const Cfg *Func) const {
+X8632::Traits::Address VariableSplit::toAsmAddress(const Cfg *Func) const {
   assert(!Var->hasReg());
   const TargetLowering *Target = Func->getTarget();
   int32_t Offset =
       Var->getStackOffset() + Target->getStackAdjustment() + getOffset();
-  return X8632::Address(RegX8632::getEncodedGPR(Target->getFrameOrStackReg()),
-                        Offset);
+  return X8632::Traits::Address(
+      RegX8632::getEncodedGPR(Target->getFrameOrStackReg()), Offset);
 }
 
 void VariableSplit::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(!Var->hasReg());
   // The following is copied/adapted from TargetX8632::emitVariable().
   const TargetLowering *Target = Func->getTarget();
   const Type Ty = IceType_i32;
@@ skipping 17 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice