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Issue 1216033004: Move X8632-specific Assembler stuff to Machine Traits. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments. Created 5 years, 5 months ago
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1 //===- subzero/src/IceAssemblerX8632.cpp - Assembler for x86-32 ----------===//
2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
3 // for details. All rights reserved. Use of this source code is governed by a
4 // BSD-style license that can be found in the LICENSE file.
5 //
6 // Modified by the Subzero authors.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // The Subzero Code Generator
11 //
12 // This file is distributed under the University of Illinois Open Source
13 // License. See LICENSE.TXT for details.
14 //
15 //===----------------------------------------------------------------------===//
16 //
17 // This file implements the Assembler class for x86-32.
18 //
19 //===----------------------------------------------------------------------===//
20
21 #include "IceAssemblerX8632.h"
22
23 #include "IceCfg.h"
24 #include "IceOperand.h"
25
26 namespace Ice {
27 namespace X8632 {
28
29 Address Address::ofConstPool(Assembler *Asm, const Constant *Imm) {
30 AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Imm);
31 const RelocOffsetT Offset = 0;
32 return Address::Absolute(Offset, Fixup);
33 }
34
35 AssemblerX8632::~AssemblerX8632() {
36 if (BuildDefs::asserts()) {
37 for (const Label *Label : CfgNodeLabels) {
38 Label->FinalCheck();
39 }
40 for (const Label *Label : LocalLabels) {
41 Label->FinalCheck();
42 }
43 }
44 }
45
46 void AssemblerX8632::alignFunction() {
47 SizeT Align = 1 << getBundleAlignLog2Bytes();
48 SizeT BytesNeeded = Utils::OffsetToAlignment(Buffer.getPosition(), Align);
49 const SizeT HltSize = 1;
50 while (BytesNeeded > 0) {
51 hlt();
52 BytesNeeded -= HltSize;
53 }
54 }
55
56 Label *AssemblerX8632::GetOrCreateLabel(SizeT Number, LabelVector &Labels) {
57 Label *L = nullptr;
58 if (Number == Labels.size()) {
59 L = new (this->allocate<Label>()) Label();
60 Labels.push_back(L);
61 return L;
62 }
63 if (Number > Labels.size()) {
64 Labels.resize(Number + 1);
65 }
66 L = Labels[Number];
67 if (!L) {
68 L = new (this->allocate<Label>()) Label();
69 Labels[Number] = L;
70 }
71 return L;
72 }
73
74 Label *AssemblerX8632::GetOrCreateCfgNodeLabel(SizeT NodeNumber) {
75 return GetOrCreateLabel(NodeNumber, CfgNodeLabels);
76 }
77
78 Label *AssemblerX8632::GetOrCreateLocalLabel(SizeT Number) {
79 return GetOrCreateLabel(Number, LocalLabels);
80 }
81
82 void AssemblerX8632::bindCfgNodeLabel(SizeT NodeNumber) {
83 assert(!getPreliminary());
84 Label *L = GetOrCreateCfgNodeLabel(NodeNumber);
85 this->bind(L);
86 }
87
88 void AssemblerX8632::BindLocalLabel(SizeT Number) {
89 Label *L = GetOrCreateLocalLabel(Number);
90 if (!getPreliminary())
91 this->bind(L);
92 }
93
94 void AssemblerX8632::call(GPRRegister reg) {
95 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
96 emitUint8(0xFF);
97 emitRegisterOperand(2, reg);
98 }
99
100 void AssemblerX8632::call(const Address &address) {
101 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
102 emitUint8(0xFF);
103 emitOperand(2, address);
104 }
105
106 void AssemblerX8632::call(const ConstantRelocatable *label) {
107 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
108 intptr_t call_start = Buffer.getPosition();
109 emitUint8(0xE8);
110 emitFixup(this->createFixup(llvm::ELF::R_386_PC32, label));
111 emitInt32(-4);
112 assert((Buffer.getPosition() - call_start) == kCallExternalLabelSize);
113 (void)call_start;
114 }
115
116 void AssemblerX8632::call(const Immediate &abs_address) {
117 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
118 intptr_t call_start = Buffer.getPosition();
119 emitUint8(0xE8);
120 emitFixup(
121 this->createFixup(llvm::ELF::R_386_PC32, AssemblerFixup::NullSymbol));
122 emitInt32(abs_address.value() - 4);
123 assert((Buffer.getPosition() - call_start) == kCallExternalLabelSize);
124 (void)call_start;
125 }
126
127 void AssemblerX8632::pushl(GPRRegister reg) {
128 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
129 emitUint8(0x50 + reg);
130 }
131
132 void AssemblerX8632::popl(GPRRegister reg) {
133 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
134 emitUint8(0x58 + reg);
135 }
136
137 void AssemblerX8632::popl(const Address &address) {
138 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
139 emitUint8(0x8F);
140 emitOperand(0, address);
141 }
142
143 void AssemblerX8632::pushal() {
144 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
145 emitUint8(0x60);
146 }
147
148 void AssemblerX8632::popal() {
149 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
150 emitUint8(0x61);
151 }
152
153 void AssemblerX8632::setcc(CondX86::BrCond condition, ByteRegister dst) {
154 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
155 emitUint8(0x0F);
156 emitUint8(0x90 + condition);
157 emitUint8(0xC0 + dst);
158 }
159
160 void AssemblerX8632::setcc(CondX86::BrCond condition, const Address &address) {
161 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
162 emitUint8(0x0F);
163 emitUint8(0x90 + condition);
164 emitOperand(0, address);
165 }
166
167 void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Immediate &imm) {
168 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
169 if (isByteSizedType(Ty)) {
170 emitUint8(0xB0 + dst);
171 emitUint8(imm.value() & 0xFF);
172 return;
173 }
174 if (Ty == IceType_i16)
175 emitOperandSizeOverride();
176 emitUint8(0xB8 + dst);
177 emitImmediate(Ty, imm);
178 }
179
180 void AssemblerX8632::mov(Type Ty, GPRRegister dst, GPRRegister src) {
181 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
182 if (Ty == IceType_i16)
183 emitOperandSizeOverride();
184 if (isByteSizedType(Ty)) {
185 emitUint8(0x88);
186 } else {
187 emitUint8(0x89);
188 }
189 emitRegisterOperand(src, dst);
190 }
191
192 void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Address &src) {
193 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
194 if (Ty == IceType_i16)
195 emitOperandSizeOverride();
196 if (isByteSizedType(Ty)) {
197 emitUint8(0x8A);
198 } else {
199 emitUint8(0x8B);
200 }
201 emitOperand(dst, src);
202 }
203
204 void AssemblerX8632::mov(Type Ty, const Address &dst, GPRRegister src) {
205 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
206 if (Ty == IceType_i16)
207 emitOperandSizeOverride();
208 if (isByteSizedType(Ty)) {
209 emitUint8(0x88);
210 } else {
211 emitUint8(0x89);
212 }
213 emitOperand(src, dst);
214 }
215
216 void AssemblerX8632::mov(Type Ty, const Address &dst, const Immediate &imm) {
217 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
218 if (Ty == IceType_i16)
219 emitOperandSizeOverride();
220 if (isByteSizedType(Ty)) {
221 emitUint8(0xC6);
222 emitOperand(0, dst);
223 emitUint8(imm.value() & 0xFF);
224 } else {
225 emitUint8(0xC7);
226 emitOperand(0, dst);
227 emitImmediate(Ty, imm);
228 }
229 }
230
231 void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, GPRRegister src) {
232 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
233 bool ByteSized = isByteSizedType(SrcTy);
234 assert(ByteSized || SrcTy == IceType_i16);
235 emitUint8(0x0F);
236 emitUint8(ByteSized ? 0xB6 : 0xB7);
237 emitRegisterOperand(dst, src);
238 }
239
240 void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
241 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
242 bool ByteSized = isByteSizedType(SrcTy);
243 assert(ByteSized || SrcTy == IceType_i16);
244 emitUint8(0x0F);
245 emitUint8(ByteSized ? 0xB6 : 0xB7);
246 emitOperand(dst, src);
247 }
248
249 void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, GPRRegister src) {
250 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
251 bool ByteSized = isByteSizedType(SrcTy);
252 assert(ByteSized || SrcTy == IceType_i16);
253 emitUint8(0x0F);
254 emitUint8(ByteSized ? 0xBE : 0xBF);
255 emitRegisterOperand(dst, src);
256 }
257
258 void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
259 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
260 bool ByteSized = isByteSizedType(SrcTy);
261 assert(ByteSized || SrcTy == IceType_i16);
262 emitUint8(0x0F);
263 emitUint8(ByteSized ? 0xBE : 0xBF);
264 emitOperand(dst, src);
265 }
266
267 void AssemblerX8632::lea(Type Ty, GPRRegister dst, const Address &src) {
268 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
269 assert(Ty == IceType_i16 || Ty == IceType_i32);
270 if (Ty == IceType_i16)
271 emitOperandSizeOverride();
272 emitUint8(0x8D);
273 emitOperand(dst, src);
274 }
275
276 void AssemblerX8632::cmov(Type Ty, CondX86::BrCond cond, GPRRegister dst,
277 GPRRegister src) {
278 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
279 if (Ty == IceType_i16)
280 emitOperandSizeOverride();
281 else
282 assert(Ty == IceType_i32);
283 emitUint8(0x0F);
284 emitUint8(0x40 + cond);
285 emitRegisterOperand(dst, src);
286 }
287
288 void AssemblerX8632::cmov(Type Ty, CondX86::BrCond cond, GPRRegister dst,
289 const Address &src) {
290 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
291 if (Ty == IceType_i16)
292 emitOperandSizeOverride();
293 else
294 assert(Ty == IceType_i32);
295 emitUint8(0x0F);
296 emitUint8(0x40 + cond);
297 emitOperand(dst, src);
298 }
299
300 void AssemblerX8632::rep_movsb() {
301 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
302 emitUint8(0xF3);
303 emitUint8(0xA4);
304 }
305
306 void AssemblerX8632::movss(Type Ty, XmmRegister dst, const Address &src) {
307 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
308 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
309 emitUint8(0x0F);
310 emitUint8(0x10);
311 emitOperand(dst, src);
312 }
313
314 void AssemblerX8632::movss(Type Ty, const Address &dst, XmmRegister src) {
315 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
316 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
317 emitUint8(0x0F);
318 emitUint8(0x11);
319 emitOperand(src, dst);
320 }
321
322 void AssemblerX8632::movss(Type Ty, XmmRegister dst, XmmRegister src) {
323 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
324 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
325 emitUint8(0x0F);
326 emitUint8(0x11);
327 emitXmmRegisterOperand(src, dst);
328 }
329
330 void AssemblerX8632::movd(XmmRegister dst, GPRRegister src) {
331 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
332 emitUint8(0x66);
333 emitUint8(0x0F);
334 emitUint8(0x6E);
335 emitRegisterOperand(dst, src);
336 }
337
338 void AssemblerX8632::movd(XmmRegister dst, const Address &src) {
339 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
340 emitUint8(0x66);
341 emitUint8(0x0F);
342 emitUint8(0x6E);
343 emitOperand(dst, src);
344 }
345
346 void AssemblerX8632::movd(GPRRegister dst, XmmRegister src) {
347 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
348 emitUint8(0x66);
349 emitUint8(0x0F);
350 emitUint8(0x7E);
351 emitRegisterOperand(src, dst);
352 }
353
354 void AssemblerX8632::movd(const Address &dst, XmmRegister src) {
355 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
356 emitUint8(0x66);
357 emitUint8(0x0F);
358 emitUint8(0x7E);
359 emitOperand(src, dst);
360 }
361
362 void AssemblerX8632::movq(XmmRegister dst, XmmRegister src) {
363 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
364 emitUint8(0xF3);
365 emitUint8(0x0F);
366 emitUint8(0x7E);
367 emitRegisterOperand(dst, src);
368 }
369
370 void AssemblerX8632::movq(const Address &dst, XmmRegister src) {
371 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
372 emitUint8(0x66);
373 emitUint8(0x0F);
374 emitUint8(0xD6);
375 emitOperand(src, dst);
376 }
377
378 void AssemblerX8632::movq(XmmRegister dst, const Address &src) {
379 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
380 emitUint8(0xF3);
381 emitUint8(0x0F);
382 emitUint8(0x7E);
383 emitOperand(dst, src);
384 }
385
386 void AssemblerX8632::addss(Type Ty, XmmRegister dst, XmmRegister src) {
387 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
388 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
389 emitUint8(0x0F);
390 emitUint8(0x58);
391 emitXmmRegisterOperand(dst, src);
392 }
393
394 void AssemblerX8632::addss(Type Ty, XmmRegister dst, const Address &src) {
395 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
396 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
397 emitUint8(0x0F);
398 emitUint8(0x58);
399 emitOperand(dst, src);
400 }
401
402 void AssemblerX8632::subss(Type Ty, XmmRegister dst, XmmRegister src) {
403 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
404 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
405 emitUint8(0x0F);
406 emitUint8(0x5C);
407 emitXmmRegisterOperand(dst, src);
408 }
409
410 void AssemblerX8632::subss(Type Ty, XmmRegister dst, const Address &src) {
411 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
412 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
413 emitUint8(0x0F);
414 emitUint8(0x5C);
415 emitOperand(dst, src);
416 }
417
418 void AssemblerX8632::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
419 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
420 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
421 emitUint8(0x0F);
422 emitUint8(0x59);
423 emitXmmRegisterOperand(dst, src);
424 }
425
426 void AssemblerX8632::mulss(Type Ty, XmmRegister dst, const Address &src) {
427 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
428 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
429 emitUint8(0x0F);
430 emitUint8(0x59);
431 emitOperand(dst, src);
432 }
433
434 void AssemblerX8632::divss(Type Ty, XmmRegister dst, XmmRegister src) {
435 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
436 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
437 emitUint8(0x0F);
438 emitUint8(0x5E);
439 emitXmmRegisterOperand(dst, src);
440 }
441
442 void AssemblerX8632::divss(Type Ty, XmmRegister dst, const Address &src) {
443 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
444 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
445 emitUint8(0x0F);
446 emitUint8(0x5E);
447 emitOperand(dst, src);
448 }
449
450 void AssemblerX8632::fld(Type Ty, const Address &src) {
451 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
452 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
453 emitOperand(0, src);
454 }
455
456 void AssemblerX8632::fstp(Type Ty, const Address &dst) {
457 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
458 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
459 emitOperand(3, dst);
460 }
461
462 void AssemblerX8632::fstp(X87STRegister st) {
463 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
464 emitUint8(0xDD);
465 emitUint8(0xD8 + st);
466 }
467
468 void AssemblerX8632::movaps(XmmRegister dst, XmmRegister src) {
469 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
470 emitUint8(0x0F);
471 emitUint8(0x28);
472 emitXmmRegisterOperand(dst, src);
473 }
474
475 void AssemblerX8632::movups(XmmRegister dst, XmmRegister src) {
476 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
477 emitUint8(0x0F);
478 emitUint8(0x10);
479 emitRegisterOperand(dst, src);
480 }
481
482 void AssemblerX8632::movups(XmmRegister dst, const Address &src) {
483 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
484 emitUint8(0x0F);
485 emitUint8(0x10);
486 emitOperand(dst, src);
487 }
488
489 void AssemblerX8632::movups(const Address &dst, XmmRegister src) {
490 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
491 emitUint8(0x0F);
492 emitUint8(0x11);
493 emitOperand(src, dst);
494 }
495
496 void AssemblerX8632::padd(Type Ty, XmmRegister dst, XmmRegister src) {
497 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
498 emitUint8(0x66);
499 emitUint8(0x0F);
500 if (isByteSizedArithType(Ty)) {
501 emitUint8(0xFC);
502 } else if (Ty == IceType_i16) {
503 emitUint8(0xFD);
504 } else {
505 emitUint8(0xFE);
506 }
507 emitXmmRegisterOperand(dst, src);
508 }
509
510 void AssemblerX8632::padd(Type Ty, XmmRegister dst, const Address &src) {
511 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
512 emitUint8(0x66);
513 emitUint8(0x0F);
514 if (isByteSizedArithType(Ty)) {
515 emitUint8(0xFC);
516 } else if (Ty == IceType_i16) {
517 emitUint8(0xFD);
518 } else {
519 emitUint8(0xFE);
520 }
521 emitOperand(dst, src);
522 }
523
524 void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, XmmRegister src) {
525 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
526 emitUint8(0x66);
527 emitUint8(0x0F);
528 emitUint8(0xDB);
529 emitXmmRegisterOperand(dst, src);
530 }
531
532 void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
533 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
534 emitUint8(0x66);
535 emitUint8(0x0F);
536 emitUint8(0xDB);
537 emitOperand(dst, src);
538 }
539
540 void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, XmmRegister src) {
541 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
542 emitUint8(0x66);
543 emitUint8(0x0F);
544 emitUint8(0xDF);
545 emitXmmRegisterOperand(dst, src);
546 }
547
548 void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
549 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
550 emitUint8(0x66);
551 emitUint8(0x0F);
552 emitUint8(0xDF);
553 emitOperand(dst, src);
554 }
555
556 void AssemblerX8632::pmull(Type Ty, XmmRegister dst, XmmRegister src) {
557 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
558 emitUint8(0x66);
559 emitUint8(0x0F);
560 if (Ty == IceType_i16) {
561 emitUint8(0xD5);
562 } else {
563 assert(Ty == IceType_i32);
564 emitUint8(0x38);
565 emitUint8(0x40);
566 }
567 emitXmmRegisterOperand(dst, src);
568 }
569
570 void AssemblerX8632::pmull(Type Ty, XmmRegister dst, const Address &src) {
571 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
572 emitUint8(0x66);
573 emitUint8(0x0F);
574 if (Ty == IceType_i16) {
575 emitUint8(0xD5);
576 } else {
577 assert(Ty == IceType_i32);
578 emitUint8(0x38);
579 emitUint8(0x40);
580 }
581 emitOperand(dst, src);
582 }
583
584 void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst, XmmRegister src) {
585 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
586 emitUint8(0x66);
587 emitUint8(0x0F);
588 emitUint8(0xF4);
589 emitXmmRegisterOperand(dst, src);
590 }
591
592 void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst,
593 const Address &src) {
594 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
595 emitUint8(0x66);
596 emitUint8(0x0F);
597 emitUint8(0xF4);
598 emitOperand(dst, src);
599 }
600
601 void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, XmmRegister src) {
602 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
603 emitUint8(0x66);
604 emitUint8(0x0F);
605 emitUint8(0xEB);
606 emitXmmRegisterOperand(dst, src);
607 }
608
609 void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, const Address &src) {
610 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
611 emitUint8(0x66);
612 emitUint8(0x0F);
613 emitUint8(0xEB);
614 emitOperand(dst, src);
615 }
616
617 void AssemblerX8632::psub(Type Ty, XmmRegister dst, XmmRegister src) {
618 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
619 emitUint8(0x66);
620 emitUint8(0x0F);
621 if (isByteSizedArithType(Ty)) {
622 emitUint8(0xF8);
623 } else if (Ty == IceType_i16) {
624 emitUint8(0xF9);
625 } else {
626 emitUint8(0xFA);
627 }
628 emitXmmRegisterOperand(dst, src);
629 }
630
631 void AssemblerX8632::psub(Type Ty, XmmRegister dst, const Address &src) {
632 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
633 emitUint8(0x66);
634 emitUint8(0x0F);
635 if (isByteSizedArithType(Ty)) {
636 emitUint8(0xF8);
637 } else if (Ty == IceType_i16) {
638 emitUint8(0xF9);
639 } else {
640 emitUint8(0xFA);
641 }
642 emitOperand(dst, src);
643 }
644
645 void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, XmmRegister src) {
646 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
647 emitUint8(0x66);
648 emitUint8(0x0F);
649 emitUint8(0xEF);
650 emitXmmRegisterOperand(dst, src);
651 }
652
653 void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
654 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
655 emitUint8(0x66);
656 emitUint8(0x0F);
657 emitUint8(0xEF);
658 emitOperand(dst, src);
659 }
660
661 void AssemblerX8632::psll(Type Ty, XmmRegister dst, XmmRegister src) {
662 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
663 emitUint8(0x66);
664 emitUint8(0x0F);
665 if (Ty == IceType_i16) {
666 emitUint8(0xF1);
667 } else {
668 assert(Ty == IceType_i32);
669 emitUint8(0xF2);
670 }
671 emitXmmRegisterOperand(dst, src);
672 }
673
674 void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Address &src) {
675 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
676 emitUint8(0x66);
677 emitUint8(0x0F);
678 if (Ty == IceType_i16) {
679 emitUint8(0xF1);
680 } else {
681 assert(Ty == IceType_i32);
682 emitUint8(0xF2);
683 }
684 emitOperand(dst, src);
685 }
686
687 void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Immediate &imm) {
688 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
689 assert(imm.is_int8());
690 emitUint8(0x66);
691 emitUint8(0x0F);
692 if (Ty == IceType_i16) {
693 emitUint8(0x71);
694 } else {
695 assert(Ty == IceType_i32);
696 emitUint8(0x72);
697 }
698 emitRegisterOperand(6, dst);
699 emitUint8(imm.value() & 0xFF);
700 }
701
702 void AssemblerX8632::psra(Type Ty, XmmRegister dst, XmmRegister src) {
703 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
704 emitUint8(0x66);
705 emitUint8(0x0F);
706 if (Ty == IceType_i16) {
707 emitUint8(0xE1);
708 } else {
709 assert(Ty == IceType_i32);
710 emitUint8(0xE2);
711 }
712 emitXmmRegisterOperand(dst, src);
713 }
714
715 void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Address &src) {
716 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
717 emitUint8(0x66);
718 emitUint8(0x0F);
719 if (Ty == IceType_i16) {
720 emitUint8(0xE1);
721 } else {
722 assert(Ty == IceType_i32);
723 emitUint8(0xE2);
724 }
725 emitOperand(dst, src);
726 }
727
728 void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Immediate &imm) {
729 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
730 assert(imm.is_int8());
731 emitUint8(0x66);
732 emitUint8(0x0F);
733 if (Ty == IceType_i16) {
734 emitUint8(0x71);
735 } else {
736 assert(Ty == IceType_i32);
737 emitUint8(0x72);
738 }
739 emitRegisterOperand(4, dst);
740 emitUint8(imm.value() & 0xFF);
741 }
742
743 void AssemblerX8632::psrl(Type Ty, XmmRegister dst, XmmRegister src) {
744 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
745 emitUint8(0x66);
746 emitUint8(0x0F);
747 if (Ty == IceType_i16) {
748 emitUint8(0xD1);
749 } else if (Ty == IceType_f64) {
750 emitUint8(0xD3);
751 } else {
752 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
753 emitUint8(0xD2);
754 }
755 emitXmmRegisterOperand(dst, src);
756 }
757
758 void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Address &src) {
759 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
760 emitUint8(0x66);
761 emitUint8(0x0F);
762 if (Ty == IceType_i16) {
763 emitUint8(0xD1);
764 } else if (Ty == IceType_f64) {
765 emitUint8(0xD3);
766 } else {
767 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
768 emitUint8(0xD2);
769 }
770 emitOperand(dst, src);
771 }
772
773 void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Immediate &imm) {
774 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
775 assert(imm.is_int8());
776 emitUint8(0x66);
777 emitUint8(0x0F);
778 if (Ty == IceType_i16) {
779 emitUint8(0x71);
780 } else if (Ty == IceType_f64) {
781 emitUint8(0x73);
782 } else {
783 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
784 emitUint8(0x72);
785 }
786 emitRegisterOperand(2, dst);
787 emitUint8(imm.value() & 0xFF);
788 }
789
790 // {add,sub,mul,div}ps are given a Ty parameter for consistency with
791 // {add,sub,mul,div}ss. In the future, when the PNaCl ABI allows
792 // addpd, etc., we can use the Ty parameter to decide on adding
793 // a 0x66 prefix.
794 void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
795 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
796 emitUint8(0x0F);
797 emitUint8(0x58);
798 emitXmmRegisterOperand(dst, src);
799 }
800
801 void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, const Address &src) {
802 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
803 emitUint8(0x0F);
804 emitUint8(0x58);
805 emitOperand(dst, src);
806 }
807
808 void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
809 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
810 emitUint8(0x0F);
811 emitUint8(0x5C);
812 emitXmmRegisterOperand(dst, src);
813 }
814
815 void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, const Address &src) {
816 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
817 emitUint8(0x0F);
818 emitUint8(0x5C);
819 emitOperand(dst, src);
820 }
821
822 void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
823 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
824 emitUint8(0x0F);
825 emitUint8(0x5E);
826 emitXmmRegisterOperand(dst, src);
827 }
828
829 void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, const Address &src) {
830 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
831 emitUint8(0x0F);
832 emitUint8(0x5E);
833 emitOperand(dst, src);
834 }
835
836 void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
837 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
838 emitUint8(0x0F);
839 emitUint8(0x59);
840 emitXmmRegisterOperand(dst, src);
841 }
842
843 void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, const Address &src) {
844 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
845 emitUint8(0x0F);
846 emitUint8(0x59);
847 emitOperand(dst, src);
848 }
849
850 void AssemblerX8632::minps(XmmRegister dst, XmmRegister src) {
851 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
852 emitUint8(0x0F);
853 emitUint8(0x5D);
854 emitXmmRegisterOperand(dst, src);
855 }
856
857 void AssemblerX8632::maxps(XmmRegister dst, XmmRegister src) {
858 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
859 emitUint8(0x0F);
860 emitUint8(0x5F);
861 emitXmmRegisterOperand(dst, src);
862 }
863
864 void AssemblerX8632::andps(XmmRegister dst, XmmRegister src) {
865 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
866 emitUint8(0x0F);
867 emitUint8(0x54);
868 emitXmmRegisterOperand(dst, src);
869 }
870
871 void AssemblerX8632::andps(XmmRegister dst, const Address &src) {
872 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
873 emitUint8(0x0F);
874 emitUint8(0x54);
875 emitOperand(dst, src);
876 }
877
878 void AssemblerX8632::orps(XmmRegister dst, XmmRegister src) {
879 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
880 emitUint8(0x0F);
881 emitUint8(0x56);
882 emitXmmRegisterOperand(dst, src);
883 }
884
885 void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
886 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
887 emitUint8(0x66);
888 emitUint8(0x0F);
889 emitUint8(0x38);
890 emitUint8(0x14);
891 emitXmmRegisterOperand(dst, src);
892 }
893
894 void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst,
895 const Address &src) {
896 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
897 emitUint8(0x66);
898 emitUint8(0x0F);
899 emitUint8(0x38);
900 emitUint8(0x14);
901 emitOperand(dst, src);
902 }
903
904 void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst, XmmRegister src) {
905 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
906 emitUint8(0x66);
907 emitUint8(0x0F);
908 emitUint8(0x38);
909 emitUint8(0x10);
910 emitXmmRegisterOperand(dst, src);
911 }
912
913 void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst,
914 const Address &src) {
915 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
916 emitUint8(0x66);
917 emitUint8(0x0F);
918 emitUint8(0x38);
919 emitUint8(0x10);
920 emitOperand(dst, src);
921 }
922
923 void AssemblerX8632::cmpps(XmmRegister dst, XmmRegister src,
924 CondX86::CmppsCond CmpCondition) {
925 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
926 emitUint8(0x0F);
927 emitUint8(0xC2);
928 emitXmmRegisterOperand(dst, src);
929 emitUint8(CmpCondition);
930 }
931
932 void AssemblerX8632::cmpps(XmmRegister dst, const Address &src,
933 CondX86::CmppsCond CmpCondition) {
934 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
935 emitUint8(0x0F);
936 emitUint8(0xC2);
937 emitOperand(dst, src);
938 emitUint8(CmpCondition);
939 }
940
941 void AssemblerX8632::sqrtps(XmmRegister dst) {
942 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
943 emitUint8(0x0F);
944 emitUint8(0x51);
945 emitXmmRegisterOperand(dst, dst);
946 }
947
948 void AssemblerX8632::rsqrtps(XmmRegister dst) {
949 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
950 emitUint8(0x0F);
951 emitUint8(0x52);
952 emitXmmRegisterOperand(dst, dst);
953 }
954
955 void AssemblerX8632::reciprocalps(XmmRegister dst) {
956 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
957 emitUint8(0x0F);
958 emitUint8(0x53);
959 emitXmmRegisterOperand(dst, dst);
960 }
961
962 void AssemblerX8632::movhlps(XmmRegister dst, XmmRegister src) {
963 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
964 emitUint8(0x0F);
965 emitUint8(0x12);
966 emitXmmRegisterOperand(dst, src);
967 }
968
969 void AssemblerX8632::movlhps(XmmRegister dst, XmmRegister src) {
970 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
971 emitUint8(0x0F);
972 emitUint8(0x16);
973 emitXmmRegisterOperand(dst, src);
974 }
975
976 void AssemblerX8632::unpcklps(XmmRegister dst, XmmRegister src) {
977 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
978 emitUint8(0x0F);
979 emitUint8(0x14);
980 emitXmmRegisterOperand(dst, src);
981 }
982
983 void AssemblerX8632::unpckhps(XmmRegister dst, XmmRegister src) {
984 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
985 emitUint8(0x0F);
986 emitUint8(0x15);
987 emitXmmRegisterOperand(dst, src);
988 }
989
990 void AssemblerX8632::unpcklpd(XmmRegister dst, XmmRegister src) {
991 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
992 emitUint8(0x66);
993 emitUint8(0x0F);
994 emitUint8(0x14);
995 emitXmmRegisterOperand(dst, src);
996 }
997
998 void AssemblerX8632::unpckhpd(XmmRegister dst, XmmRegister src) {
999 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1000 emitUint8(0x66);
1001 emitUint8(0x0F);
1002 emitUint8(0x15);
1003 emitXmmRegisterOperand(dst, src);
1004 }
1005
1006 void AssemblerX8632::set1ps(XmmRegister dst, GPRRegister tmp1,
1007 const Immediate &imm) {
1008 // Load 32-bit immediate value into tmp1.
1009 mov(IceType_i32, tmp1, imm);
1010 // Move value from tmp1 into dst.
1011 movd(dst, tmp1);
1012 // Broadcast low lane into other three lanes.
1013 shufps(dst, dst, Immediate(0x0));
1014 }
1015
1016 void AssemblerX8632::shufps(XmmRegister dst, XmmRegister src,
1017 const Immediate &imm) {
1018 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1019 emitUint8(0x0F);
1020 emitUint8(0xC6);
1021 emitXmmRegisterOperand(dst, src);
1022 assert(imm.is_uint8());
1023 emitUint8(imm.value());
1024 }
1025
1026 void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src,
1027 const Immediate &imm) {
1028 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1029 emitUint8(0x66);
1030 emitUint8(0x0F);
1031 emitUint8(0x70);
1032 emitXmmRegisterOperand(dst, src);
1033 assert(imm.is_uint8());
1034 emitUint8(imm.value());
1035 }
1036
1037 void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
1038 const Immediate &imm) {
1039 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1040 emitUint8(0x66);
1041 emitUint8(0x0F);
1042 emitUint8(0x70);
1043 emitOperand(dst, src);
1044 assert(imm.is_uint8());
1045 emitUint8(imm.value());
1046 }
1047
1048 void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src,
1049 const Immediate &imm) {
1050 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1051 emitUint8(0x0F);
1052 emitUint8(0xC6);
1053 emitXmmRegisterOperand(dst, src);
1054 assert(imm.is_uint8());
1055 emitUint8(imm.value());
1056 }
1057
1058 void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
1059 const Immediate &imm) {
1060 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1061 emitUint8(0x0F);
1062 emitUint8(0xC6);
1063 emitOperand(dst, src);
1064 assert(imm.is_uint8());
1065 emitUint8(imm.value());
1066 }
1067
1068 void AssemblerX8632::minpd(XmmRegister dst, XmmRegister src) {
1069 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1070 emitUint8(0x66);
1071 emitUint8(0x0F);
1072 emitUint8(0x5D);
1073 emitXmmRegisterOperand(dst, src);
1074 }
1075
1076 void AssemblerX8632::maxpd(XmmRegister dst, XmmRegister src) {
1077 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1078 emitUint8(0x66);
1079 emitUint8(0x0F);
1080 emitUint8(0x5F);
1081 emitXmmRegisterOperand(dst, src);
1082 }
1083
1084 void AssemblerX8632::sqrtpd(XmmRegister dst) {
1085 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1086 emitUint8(0x66);
1087 emitUint8(0x0F);
1088 emitUint8(0x51);
1089 emitXmmRegisterOperand(dst, dst);
1090 }
1091
1092 void AssemblerX8632::shufpd(XmmRegister dst, XmmRegister src,
1093 const Immediate &imm) {
1094 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1095 emitUint8(0x66);
1096 emitUint8(0x0F);
1097 emitUint8(0xC6);
1098 emitXmmRegisterOperand(dst, src);
1099 assert(imm.is_uint8());
1100 emitUint8(imm.value());
1101 }
1102
1103 void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
1104 XmmRegister src) {
1105 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1106 emitUint8(0x0F);
1107 emitUint8(0x5B);
1108 emitXmmRegisterOperand(dst, src);
1109 }
1110
1111 void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
1112 const Address &src) {
1113 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1114 emitUint8(0x0F);
1115 emitUint8(0x5B);
1116 emitOperand(dst, src);
1117 }
1118
1119 void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
1120 XmmRegister src) {
1121 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1122 emitUint8(0xF3);
1123 emitUint8(0x0F);
1124 emitUint8(0x5B);
1125 emitXmmRegisterOperand(dst, src);
1126 }
1127
1128 void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
1129 const Address &src) {
1130 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1131 emitUint8(0xF3);
1132 emitUint8(0x0F);
1133 emitUint8(0x5B);
1134 emitOperand(dst, src);
1135 }
1136
1137 void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst, GPRRegister src) {
1138 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1139 emitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
1140 emitUint8(0x0F);
1141 emitUint8(0x2A);
1142 emitRegisterOperand(dst, src);
1143 }
1144
1145 void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst,
1146 const Address &src) {
1147 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1148 emitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
1149 emitUint8(0x0F);
1150 emitUint8(0x2A);
1151 emitOperand(dst, src);
1152 }
1153
1154 void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
1155 XmmRegister src) {
1156 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1157 // ss2sd or sd2ss
1158 emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
1159 emitUint8(0x0F);
1160 emitUint8(0x5A);
1161 emitXmmRegisterOperand(dst, src);
1162 }
1163
1164 void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
1165 const Address &src) {
1166 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1167 emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
1168 emitUint8(0x0F);
1169 emitUint8(0x5A);
1170 emitOperand(dst, src);
1171 }
1172
1173 void AssemblerX8632::cvttss2si(Type SrcTy, GPRRegister dst, XmmRegister src) {
1174 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1175 emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
1176 emitUint8(0x0F);
1177 emitUint8(0x2C);
1178 emitXmmRegisterOperand(dst, src);
1179 }
1180
1181 void AssemblerX8632::cvttss2si(Type SrcTy, GPRRegister dst,
1182 const Address &src) {
1183 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1184 emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
1185 emitUint8(0x0F);
1186 emitUint8(0x2C);
1187 emitOperand(dst, src);
1188 }
1189
1190 void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, XmmRegister b) {
1191 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1192 if (Ty == IceType_f64)
1193 emitUint8(0x66);
1194 emitUint8(0x0F);
1195 emitUint8(0x2E);
1196 emitXmmRegisterOperand(a, b);
1197 }
1198
1199 void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, const Address &b) {
1200 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1201 if (Ty == IceType_f64)
1202 emitUint8(0x66);
1203 emitUint8(0x0F);
1204 emitUint8(0x2E);
1205 emitOperand(a, b);
1206 }
1207
1208 void AssemblerX8632::movmskpd(GPRRegister dst, XmmRegister src) {
1209 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1210 emitUint8(0x66);
1211 emitUint8(0x0F);
1212 emitUint8(0x50);
1213 emitXmmRegisterOperand(dst, src);
1214 }
1215
1216 void AssemblerX8632::movmskps(GPRRegister dst, XmmRegister src) {
1217 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1218 emitUint8(0x0F);
1219 emitUint8(0x50);
1220 emitXmmRegisterOperand(dst, src);
1221 }
1222
1223 void AssemblerX8632::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
1224 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1225 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1226 emitUint8(0x0F);
1227 emitUint8(0x51);
1228 emitOperand(dst, src);
1229 }
1230
1231 void AssemblerX8632::sqrtss(Type Ty, XmmRegister dst, XmmRegister src) {
1232 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1233 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1234 emitUint8(0x0F);
1235 emitUint8(0x51);
1236 emitXmmRegisterOperand(dst, src);
1237 }
1238
1239 void AssemblerX8632::xorpd(XmmRegister dst, const Address &src) {
1240 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1241 emitUint8(0x66);
1242 emitUint8(0x0F);
1243 emitUint8(0x57);
1244 emitOperand(dst, src);
1245 }
1246
1247 void AssemblerX8632::xorpd(XmmRegister dst, XmmRegister src) {
1248 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1249 emitUint8(0x66);
1250 emitUint8(0x0F);
1251 emitUint8(0x57);
1252 emitXmmRegisterOperand(dst, src);
1253 }
1254
1255 void AssemblerX8632::orpd(XmmRegister dst, XmmRegister src) {
1256 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1257 emitUint8(0x66);
1258 emitUint8(0x0F);
1259 emitUint8(0x56);
1260 emitXmmRegisterOperand(dst, src);
1261 }
1262
1263 void AssemblerX8632::xorps(XmmRegister dst, const Address &src) {
1264 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1265 emitUint8(0x0F);
1266 emitUint8(0x57);
1267 emitOperand(dst, src);
1268 }
1269
1270 void AssemblerX8632::xorps(XmmRegister dst, XmmRegister src) {
1271 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1272 emitUint8(0x0F);
1273 emitUint8(0x57);
1274 emitXmmRegisterOperand(dst, src);
1275 }
1276
1277 void AssemblerX8632::andpd(XmmRegister dst, const Address &src) {
1278 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1279 emitUint8(0x66);
1280 emitUint8(0x0F);
1281 emitUint8(0x54);
1282 emitOperand(dst, src);
1283 }
1284
1285 void AssemblerX8632::andpd(XmmRegister dst, XmmRegister src) {
1286 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1287 emitUint8(0x66);
1288 emitUint8(0x0F);
1289 emitUint8(0x54);
1290 emitXmmRegisterOperand(dst, src);
1291 }
1292
1293 void AssemblerX8632::insertps(Type Ty, XmmRegister dst, XmmRegister src,
1294 const Immediate &imm) {
1295 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1296 assert(imm.is_uint8());
1297 assert(isVectorFloatingType(Ty));
1298 (void)Ty;
1299 emitUint8(0x66);
1300 emitUint8(0x0F);
1301 emitUint8(0x3A);
1302 emitUint8(0x21);
1303 emitXmmRegisterOperand(dst, src);
1304 emitUint8(imm.value());
1305 }
1306
1307 void AssemblerX8632::insertps(Type Ty, XmmRegister dst, const Address &src,
1308 const Immediate &imm) {
1309 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1310 assert(imm.is_uint8());
1311 assert(isVectorFloatingType(Ty));
1312 (void)Ty;
1313 emitUint8(0x66);
1314 emitUint8(0x0F);
1315 emitUint8(0x3A);
1316 emitUint8(0x21);
1317 emitOperand(dst, src);
1318 emitUint8(imm.value());
1319 }
1320
1321 void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, GPRRegister src,
1322 const Immediate &imm) {
1323 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1324 assert(imm.is_uint8());
1325 if (Ty == IceType_i16) {
1326 emitUint8(0x66);
1327 emitUint8(0x0F);
1328 emitUint8(0xC4);
1329 emitXmmRegisterOperand(dst, XmmRegister(src));
1330 emitUint8(imm.value());
1331 } else {
1332 emitUint8(0x66);
1333 emitUint8(0x0F);
1334 emitUint8(0x3A);
1335 emitUint8(isByteSizedType(Ty) ? 0x20 : 0x22);
1336 emitXmmRegisterOperand(dst, XmmRegister(src));
1337 emitUint8(imm.value());
1338 }
1339 }
1340
1341 void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, const Address &src,
1342 const Immediate &imm) {
1343 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1344 assert(imm.is_uint8());
1345 if (Ty == IceType_i16) {
1346 emitUint8(0x66);
1347 emitUint8(0x0F);
1348 emitUint8(0xC4);
1349 emitOperand(dst, src);
1350 emitUint8(imm.value());
1351 } else {
1352 emitUint8(0x66);
1353 emitUint8(0x0F);
1354 emitUint8(0x3A);
1355 emitUint8(isByteSizedType(Ty) ? 0x20 : 0x22);
1356 emitOperand(dst, src);
1357 emitUint8(imm.value());
1358 }
1359 }
1360
1361 void AssemblerX8632::pextr(Type Ty, GPRRegister dst, XmmRegister src,
1362 const Immediate &imm) {
1363 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1364 assert(imm.is_uint8());
1365 if (Ty == IceType_i16) {
1366 emitUint8(0x66);
1367 emitUint8(0x0F);
1368 emitUint8(0xC5);
1369 emitXmmRegisterOperand(XmmRegister(dst), src);
1370 emitUint8(imm.value());
1371 } else {
1372 emitUint8(0x66);
1373 emitUint8(0x0F);
1374 emitUint8(0x3A);
1375 emitUint8(isByteSizedType(Ty) ? 0x14 : 0x16);
1376 // SSE 4.1 versions are "MRI" because dst can be mem, while
1377 // pextrw (SSE2) is RMI because dst must be reg.
1378 emitXmmRegisterOperand(src, XmmRegister(dst));
1379 emitUint8(imm.value());
1380 }
1381 }
1382
1383 void AssemblerX8632::pmovsxdq(XmmRegister dst, XmmRegister src) {
1384 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1385 emitUint8(0x66);
1386 emitUint8(0x0F);
1387 emitUint8(0x38);
1388 emitUint8(0x25);
1389 emitXmmRegisterOperand(dst, src);
1390 }
1391
1392 void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, XmmRegister src) {
1393 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1394 emitUint8(0x66);
1395 emitUint8(0x0F);
1396 if (isByteSizedArithType(Ty)) {
1397 emitUint8(0x74);
1398 } else if (Ty == IceType_i16) {
1399 emitUint8(0x75);
1400 } else {
1401 emitUint8(0x76);
1402 }
1403 emitXmmRegisterOperand(dst, src);
1404 }
1405
1406 void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
1407 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1408 emitUint8(0x66);
1409 emitUint8(0x0F);
1410 if (isByteSizedArithType(Ty)) {
1411 emitUint8(0x74);
1412 } else if (Ty == IceType_i16) {
1413 emitUint8(0x75);
1414 } else {
1415 emitUint8(0x76);
1416 }
1417 emitOperand(dst, src);
1418 }
1419
1420 void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, XmmRegister src) {
1421 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1422 emitUint8(0x66);
1423 emitUint8(0x0F);
1424 if (isByteSizedArithType(Ty)) {
1425 emitUint8(0x64);
1426 } else if (Ty == IceType_i16) {
1427 emitUint8(0x65);
1428 } else {
1429 emitUint8(0x66);
1430 }
1431 emitXmmRegisterOperand(dst, src);
1432 }
1433
1434 void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
1435 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1436 emitUint8(0x66);
1437 emitUint8(0x0F);
1438 if (isByteSizedArithType(Ty)) {
1439 emitUint8(0x64);
1440 } else if (Ty == IceType_i16) {
1441 emitUint8(0x65);
1442 } else {
1443 emitUint8(0x66);
1444 }
1445 emitOperand(dst, src);
1446 }
1447
1448 void AssemblerX8632::roundsd(XmmRegister dst, XmmRegister src,
1449 RoundingMode mode) {
1450 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1451 emitUint8(0x66);
1452 emitUint8(0x0F);
1453 emitUint8(0x3A);
1454 emitUint8(0x0B);
1455 emitXmmRegisterOperand(dst, src);
1456 // Mask precision exeption.
1457 emitUint8(static_cast<uint8_t>(mode) | 0x8);
1458 }
1459
1460 void AssemblerX8632::fnstcw(const Address &dst) {
1461 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1462 emitUint8(0xD9);
1463 emitOperand(7, dst);
1464 }
1465
1466 void AssemblerX8632::fldcw(const Address &src) {
1467 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1468 emitUint8(0xD9);
1469 emitOperand(5, src);
1470 }
1471
1472 void AssemblerX8632::fistpl(const Address &dst) {
1473 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1474 emitUint8(0xDF);
1475 emitOperand(7, dst);
1476 }
1477
1478 void AssemblerX8632::fistps(const Address &dst) {
1479 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1480 emitUint8(0xDB);
1481 emitOperand(3, dst);
1482 }
1483
1484 void AssemblerX8632::fildl(const Address &src) {
1485 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1486 emitUint8(0xDF);
1487 emitOperand(5, src);
1488 }
1489
1490 void AssemblerX8632::filds(const Address &src) {
1491 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1492 emitUint8(0xDB);
1493 emitOperand(0, src);
1494 }
1495
1496 void AssemblerX8632::fincstp() {
1497 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1498 emitUint8(0xD9);
1499 emitUint8(0xF7);
1500 }
1501
1502 template <uint32_t Tag>
1503 void AssemblerX8632::arith_int(Type Ty, GPRRegister reg, const Immediate &imm) {
1504 static_assert(Tag < 8, "Tag must be between 0..7");
1505 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1506 if (isByteSizedType(Ty)) {
1507 emitComplexI8(Tag, Operand(reg), imm);
1508 return;
1509 }
1510 if (Ty == IceType_i16)
1511 emitOperandSizeOverride();
1512 emitComplex(Ty, Tag, Operand(reg), imm);
1513 }
1514
1515 template <uint32_t Tag>
1516 void AssemblerX8632::arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1) {
1517 static_assert(Tag < 8, "Tag must be between 0..7");
1518 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1519 if (Ty == IceType_i16)
1520 emitOperandSizeOverride();
1521 if (isByteSizedType(Ty))
1522 emitUint8(Tag * 8 + 2);
1523 else
1524 emitUint8(Tag * 8 + 3);
1525 emitRegisterOperand(reg0, reg1);
1526 }
1527
1528 template <uint32_t Tag>
1529 void AssemblerX8632::arith_int(Type Ty, GPRRegister reg,
1530 const Address &address) {
1531 static_assert(Tag < 8, "Tag must be between 0..7");
1532 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1533 if (Ty == IceType_i16)
1534 emitOperandSizeOverride();
1535 if (isByteSizedType(Ty))
1536 emitUint8(Tag * 8 + 2);
1537 else
1538 emitUint8(Tag * 8 + 3);
1539 emitOperand(reg, address);
1540 }
1541
1542 template <uint32_t Tag>
1543 void AssemblerX8632::arith_int(Type Ty, const Address &address,
1544 GPRRegister reg) {
1545 static_assert(Tag < 8, "Tag must be between 0..7");
1546 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1547 if (Ty == IceType_i16)
1548 emitOperandSizeOverride();
1549 if (isByteSizedType(Ty))
1550 emitUint8(Tag * 8 + 0);
1551 else
1552 emitUint8(Tag * 8 + 1);
1553 emitOperand(reg, address);
1554 }
1555
1556 template <uint32_t Tag>
1557 void AssemblerX8632::arith_int(Type Ty, const Address &address,
1558 const Immediate &imm) {
1559 static_assert(Tag < 8, "Tag must be between 0..7");
1560 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1561 if (isByteSizedType(Ty)) {
1562 emitComplexI8(Tag, address, imm);
1563 return;
1564 }
1565 if (Ty == IceType_i16)
1566 emitOperandSizeOverride();
1567 emitComplex(Ty, Tag, address, imm);
1568 }
1569
1570 void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Immediate &imm) {
1571 arith_int<7>(Ty, reg, imm);
1572 }
1573
1574 void AssemblerX8632::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) {
1575 arith_int<7>(Ty, reg0, reg1);
1576 }
1577
1578 void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Address &address) {
1579 arith_int<7>(Ty, reg, address);
1580 }
1581
1582 void AssemblerX8632::cmp(Type Ty, const Address &address, GPRRegister reg) {
1583 arith_int<7>(Ty, address, reg);
1584 }
1585
1586 void AssemblerX8632::cmp(Type Ty, const Address &address,
1587 const Immediate &imm) {
1588 arith_int<7>(Ty, address, imm);
1589 }
1590
1591 void AssemblerX8632::test(Type Ty, GPRRegister reg1, GPRRegister reg2) {
1592 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1593 if (Ty == IceType_i16)
1594 emitOperandSizeOverride();
1595 if (isByteSizedType(Ty))
1596 emitUint8(0x84);
1597 else
1598 emitUint8(0x85);
1599 emitRegisterOperand(reg1, reg2);
1600 }
1601
1602 void AssemblerX8632::test(Type Ty, const Address &addr, GPRRegister reg) {
1603 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1604 if (Ty == IceType_i16)
1605 emitOperandSizeOverride();
1606 if (isByteSizedType(Ty))
1607 emitUint8(0x84);
1608 else
1609 emitUint8(0x85);
1610 emitOperand(reg, addr);
1611 }
1612
1613 void AssemblerX8632::test(Type Ty, GPRRegister reg,
1614 const Immediate &immediate) {
1615 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1616 // For registers that have a byte variant (EAX, EBX, ECX, and EDX)
1617 // we only test the byte register to keep the encoding short.
1618 // This is legal even if the register had high bits set since
1619 // this only sets flags registers based on the "AND" of the two operands,
1620 // and the immediate had zeros at those high bits.
1621 if (immediate.is_uint8() && reg < 4) {
1622 // Use zero-extended 8-bit immediate.
1623 if (reg == RegX8632::Encoded_Reg_eax) {
1624 emitUint8(0xA8);
1625 } else {
1626 emitUint8(0xF6);
1627 emitUint8(0xC0 + reg);
1628 }
1629 emitUint8(immediate.value() & 0xFF);
1630 } else if (reg == RegX8632::Encoded_Reg_eax) {
1631 // Use short form if the destination is EAX.
1632 if (Ty == IceType_i16)
1633 emitOperandSizeOverride();
1634 emitUint8(0xA9);
1635 emitImmediate(Ty, immediate);
1636 } else {
1637 if (Ty == IceType_i16)
1638 emitOperandSizeOverride();
1639 emitUint8(0xF7);
1640 emitRegisterOperand(0, reg);
1641 emitImmediate(Ty, immediate);
1642 }
1643 }
1644
1645 void AssemblerX8632::test(Type Ty, const Address &addr,
1646 const Immediate &immediate) {
1647 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1648 // If the immediate is short, we only test the byte addr to keep the
1649 // encoding short.
1650 if (immediate.is_uint8()) {
1651 // Use zero-extended 8-bit immediate.
1652 emitUint8(0xF6);
1653 emitOperand(0, addr);
1654 emitUint8(immediate.value() & 0xFF);
1655 } else {
1656 if (Ty == IceType_i16)
1657 emitOperandSizeOverride();
1658 emitUint8(0xF7);
1659 emitOperand(0, addr);
1660 emitImmediate(Ty, immediate);
1661 }
1662 }
1663
1664 void AssemblerX8632::And(Type Ty, GPRRegister dst, GPRRegister src) {
1665 arith_int<4>(Ty, dst, src);
1666 }
1667
1668 void AssemblerX8632::And(Type Ty, GPRRegister dst, const Address &address) {
1669 arith_int<4>(Ty, dst, address);
1670 }
1671
1672 void AssemblerX8632::And(Type Ty, GPRRegister dst, const Immediate &imm) {
1673 arith_int<4>(Ty, dst, imm);
1674 }
1675
1676 void AssemblerX8632::And(Type Ty, const Address &address, GPRRegister reg) {
1677 arith_int<4>(Ty, address, reg);
1678 }
1679
1680 void AssemblerX8632::And(Type Ty, const Address &address,
1681 const Immediate &imm) {
1682 arith_int<4>(Ty, address, imm);
1683 }
1684
1685 void AssemblerX8632::Or(Type Ty, GPRRegister dst, GPRRegister src) {
1686 arith_int<1>(Ty, dst, src);
1687 }
1688
1689 void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Address &address) {
1690 arith_int<1>(Ty, dst, address);
1691 }
1692
1693 void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
1694 arith_int<1>(Ty, dst, imm);
1695 }
1696
1697 void AssemblerX8632::Or(Type Ty, const Address &address, GPRRegister reg) {
1698 arith_int<1>(Ty, address, reg);
1699 }
1700
1701 void AssemblerX8632::Or(Type Ty, const Address &address, const Immediate &imm) {
1702 arith_int<1>(Ty, address, imm);
1703 }
1704
1705 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
1706 arith_int<6>(Ty, dst, src);
1707 }
1708
1709 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Address &address) {
1710 arith_int<6>(Ty, dst, address);
1711 }
1712
1713 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
1714 arith_int<6>(Ty, dst, imm);
1715 }
1716
1717 void AssemblerX8632::Xor(Type Ty, const Address &address, GPRRegister reg) {
1718 arith_int<6>(Ty, address, reg);
1719 }
1720
1721 void AssemblerX8632::Xor(Type Ty, const Address &address,
1722 const Immediate &imm) {
1723 arith_int<6>(Ty, address, imm);
1724 }
1725
1726 void AssemblerX8632::add(Type Ty, GPRRegister dst, GPRRegister src) {
1727 arith_int<0>(Ty, dst, src);
1728 }
1729
1730 void AssemblerX8632::add(Type Ty, GPRRegister reg, const Address &address) {
1731 arith_int<0>(Ty, reg, address);
1732 }
1733
1734 void AssemblerX8632::add(Type Ty, GPRRegister reg, const Immediate &imm) {
1735 arith_int<0>(Ty, reg, imm);
1736 }
1737
1738 void AssemblerX8632::add(Type Ty, const Address &address, GPRRegister reg) {
1739 arith_int<0>(Ty, address, reg);
1740 }
1741
1742 void AssemblerX8632::add(Type Ty, const Address &address,
1743 const Immediate &imm) {
1744 arith_int<0>(Ty, address, imm);
1745 }
1746
1747 void AssemblerX8632::adc(Type Ty, GPRRegister dst, GPRRegister src) {
1748 arith_int<2>(Ty, dst, src);
1749 }
1750
1751 void AssemblerX8632::adc(Type Ty, GPRRegister dst, const Address &address) {
1752 arith_int<2>(Ty, dst, address);
1753 }
1754
1755 void AssemblerX8632::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
1756 arith_int<2>(Ty, reg, imm);
1757 }
1758
1759 void AssemblerX8632::adc(Type Ty, const Address &address, GPRRegister reg) {
1760 arith_int<2>(Ty, address, reg);
1761 }
1762
1763 void AssemblerX8632::adc(Type Ty, const Address &address,
1764 const Immediate &imm) {
1765 arith_int<2>(Ty, address, imm);
1766 }
1767
1768 void AssemblerX8632::sub(Type Ty, GPRRegister dst, GPRRegister src) {
1769 arith_int<5>(Ty, dst, src);
1770 }
1771
1772 void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Address &address) {
1773 arith_int<5>(Ty, reg, address);
1774 }
1775
1776 void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
1777 arith_int<5>(Ty, reg, imm);
1778 }
1779
1780 void AssemblerX8632::sub(Type Ty, const Address &address, GPRRegister reg) {
1781 arith_int<5>(Ty, address, reg);
1782 }
1783
1784 void AssemblerX8632::sub(Type Ty, const Address &address,
1785 const Immediate &imm) {
1786 arith_int<5>(Ty, address, imm);
1787 }
1788
1789 void AssemblerX8632::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
1790 arith_int<3>(Ty, dst, src);
1791 }
1792
1793 void AssemblerX8632::sbb(Type Ty, GPRRegister dst, const Address &address) {
1794 arith_int<3>(Ty, dst, address);
1795 }
1796
1797 void AssemblerX8632::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
1798 arith_int<3>(Ty, reg, imm);
1799 }
1800
1801 void AssemblerX8632::sbb(Type Ty, const Address &address, GPRRegister reg) {
1802 arith_int<3>(Ty, address, reg);
1803 }
1804
1805 void AssemblerX8632::sbb(Type Ty, const Address &address,
1806 const Immediate &imm) {
1807 arith_int<3>(Ty, address, imm);
1808 }
1809
1810 void AssemblerX8632::cbw() {
1811 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1812 emitOperandSizeOverride();
1813 emitUint8(0x98);
1814 }
1815
1816 void AssemblerX8632::cwd() {
1817 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1818 emitOperandSizeOverride();
1819 emitUint8(0x99);
1820 }
1821
1822 void AssemblerX8632::cdq() {
1823 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1824 emitUint8(0x99);
1825 }
1826
1827 void AssemblerX8632::div(Type Ty, GPRRegister reg) {
1828 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1829 if (Ty == IceType_i16)
1830 emitOperandSizeOverride();
1831 if (isByteSizedArithType(Ty))
1832 emitUint8(0xF6);
1833 else
1834 emitUint8(0xF7);
1835 emitRegisterOperand(6, reg);
1836 }
1837
1838 void AssemblerX8632::div(Type Ty, const Address &addr) {
1839 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1840 if (Ty == IceType_i16)
1841 emitOperandSizeOverride();
1842 if (isByteSizedArithType(Ty))
1843 emitUint8(0xF6);
1844 else
1845 emitUint8(0xF7);
1846 emitOperand(6, addr);
1847 }
1848
1849 void AssemblerX8632::idiv(Type Ty, GPRRegister reg) {
1850 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1851 if (Ty == IceType_i16)
1852 emitOperandSizeOverride();
1853 if (isByteSizedArithType(Ty))
1854 emitUint8(0xF6);
1855 else
1856 emitUint8(0xF7);
1857 emitRegisterOperand(7, reg);
1858 }
1859
1860 void AssemblerX8632::idiv(Type Ty, const Address &addr) {
1861 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1862 if (Ty == IceType_i16)
1863 emitOperandSizeOverride();
1864 if (isByteSizedArithType(Ty))
1865 emitUint8(0xF6);
1866 else
1867 emitUint8(0xF7);
1868 emitOperand(7, addr);
1869 }
1870
1871 void AssemblerX8632::imul(Type Ty, GPRRegister dst, GPRRegister src) {
1872 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1873 assert(Ty == IceType_i16 || Ty == IceType_i32);
1874 if (Ty == IceType_i16)
1875 emitOperandSizeOverride();
1876 emitUint8(0x0F);
1877 emitUint8(0xAF);
1878 emitRegisterOperand(dst, src);
1879 }
1880
1881 void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Address &address) {
1882 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1883 assert(Ty == IceType_i16 || Ty == IceType_i32);
1884 if (Ty == IceType_i16)
1885 emitOperandSizeOverride();
1886 emitUint8(0x0F);
1887 emitUint8(0xAF);
1888 emitOperand(reg, address);
1889 }
1890
1891 void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Immediate &imm) {
1892 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1893 assert(Ty == IceType_i16 || Ty == IceType_i32);
1894 if (Ty == IceType_i16)
1895 emitOperandSizeOverride();
1896 if (imm.is_int8()) {
1897 emitUint8(0x6B);
1898 emitRegisterOperand(reg, reg);
1899 emitUint8(imm.value() & 0xFF);
1900 } else {
1901 emitUint8(0x69);
1902 emitRegisterOperand(reg, reg);
1903 emitImmediate(Ty, imm);
1904 }
1905 }
1906
1907 void AssemblerX8632::imul(Type Ty, GPRRegister reg) {
1908 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1909 if (Ty == IceType_i16)
1910 emitOperandSizeOverride();
1911 if (isByteSizedArithType(Ty))
1912 emitUint8(0xF6);
1913 else
1914 emitUint8(0xF7);
1915 emitRegisterOperand(5, reg);
1916 }
1917
1918 void AssemblerX8632::imul(Type Ty, const Address &address) {
1919 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1920 if (Ty == IceType_i16)
1921 emitOperandSizeOverride();
1922 if (isByteSizedArithType(Ty))
1923 emitUint8(0xF6);
1924 else
1925 emitUint8(0xF7);
1926 emitOperand(5, address);
1927 }
1928
1929 void AssemblerX8632::mul(Type Ty, GPRRegister reg) {
1930 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1931 if (Ty == IceType_i16)
1932 emitOperandSizeOverride();
1933 if (isByteSizedArithType(Ty))
1934 emitUint8(0xF6);
1935 else
1936 emitUint8(0xF7);
1937 emitRegisterOperand(4, reg);
1938 }
1939
1940 void AssemblerX8632::mul(Type Ty, const Address &address) {
1941 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1942 if (Ty == IceType_i16)
1943 emitOperandSizeOverride();
1944 if (isByteSizedArithType(Ty))
1945 emitUint8(0xF6);
1946 else
1947 emitUint8(0xF7);
1948 emitOperand(4, address);
1949 }
1950
1951 void AssemblerX8632::incl(GPRRegister reg) {
1952 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1953 emitUint8(0x40 + reg);
1954 }
1955
1956 void AssemblerX8632::incl(const Address &address) {
1957 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1958 emitUint8(0xFF);
1959 emitOperand(0, address);
1960 }
1961
1962 void AssemblerX8632::decl(GPRRegister reg) {
1963 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1964 emitUint8(0x48 + reg);
1965 }
1966
1967 void AssemblerX8632::decl(const Address &address) {
1968 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1969 emitUint8(0xFF);
1970 emitOperand(1, address);
1971 }
1972
1973 void AssemblerX8632::rol(Type Ty, GPRRegister reg, const Immediate &imm) {
1974 emitGenericShift(0, Ty, reg, imm);
1975 }
1976
1977 void AssemblerX8632::rol(Type Ty, GPRRegister operand, GPRRegister shifter) {
1978 emitGenericShift(0, Ty, Operand(operand), shifter);
1979 }
1980
1981 void AssemblerX8632::rol(Type Ty, const Address &operand, GPRRegister shifter) {
1982 emitGenericShift(0, Ty, operand, shifter);
1983 }
1984
1985 void AssemblerX8632::shl(Type Ty, GPRRegister reg, const Immediate &imm) {
1986 emitGenericShift(4, Ty, reg, imm);
1987 }
1988
1989 void AssemblerX8632::shl(Type Ty, GPRRegister operand, GPRRegister shifter) {
1990 emitGenericShift(4, Ty, Operand(operand), shifter);
1991 }
1992
1993 void AssemblerX8632::shl(Type Ty, const Address &operand, GPRRegister shifter) {
1994 emitGenericShift(4, Ty, operand, shifter);
1995 }
1996
1997 void AssemblerX8632::shr(Type Ty, GPRRegister reg, const Immediate &imm) {
1998 emitGenericShift(5, Ty, reg, imm);
1999 }
2000
2001 void AssemblerX8632::shr(Type Ty, GPRRegister operand, GPRRegister shifter) {
2002 emitGenericShift(5, Ty, Operand(operand), shifter);
2003 }
2004
2005 void AssemblerX8632::shr(Type Ty, const Address &operand, GPRRegister shifter) {
2006 emitGenericShift(5, Ty, operand, shifter);
2007 }
2008
2009 void AssemblerX8632::sar(Type Ty, GPRRegister reg, const Immediate &imm) {
2010 emitGenericShift(7, Ty, reg, imm);
2011 }
2012
2013 void AssemblerX8632::sar(Type Ty, GPRRegister operand, GPRRegister shifter) {
2014 emitGenericShift(7, Ty, Operand(operand), shifter);
2015 }
2016
2017 void AssemblerX8632::sar(Type Ty, const Address &address, GPRRegister shifter) {
2018 emitGenericShift(7, Ty, address, shifter);
2019 }
2020
2021 void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src) {
2022 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2023 assert(Ty == IceType_i16 || Ty == IceType_i32);
2024 if (Ty == IceType_i16)
2025 emitOperandSizeOverride();
2026 emitUint8(0x0F);
2027 emitUint8(0xA5);
2028 emitRegisterOperand(src, dst);
2029 }
2030
2031 void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src,
2032 const Immediate &imm) {
2033 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2034 assert(Ty == IceType_i16 || Ty == IceType_i32);
2035 assert(imm.is_int8());
2036 if (Ty == IceType_i16)
2037 emitOperandSizeOverride();
2038 emitUint8(0x0F);
2039 emitUint8(0xA4);
2040 emitRegisterOperand(src, dst);
2041 emitUint8(imm.value() & 0xFF);
2042 }
2043
2044 void AssemblerX8632::shld(Type Ty, const Address &operand, GPRRegister src) {
2045 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2046 assert(Ty == IceType_i16 || Ty == IceType_i32);
2047 if (Ty == IceType_i16)
2048 emitOperandSizeOverride();
2049 emitUint8(0x0F);
2050 emitUint8(0xA5);
2051 emitOperand(src, operand);
2052 }
2053
2054 void AssemblerX8632::shrd(Type Ty, GPRRegister dst, GPRRegister src) {
2055 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2056 assert(Ty == IceType_i16 || Ty == IceType_i32);
2057 if (Ty == IceType_i16)
2058 emitOperandSizeOverride();
2059 emitUint8(0x0F);
2060 emitUint8(0xAD);
2061 emitRegisterOperand(src, dst);
2062 }
2063
2064 void AssemblerX8632::shrd(Type Ty, GPRRegister dst, GPRRegister src,
2065 const Immediate &imm) {
2066 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2067 assert(Ty == IceType_i16 || Ty == IceType_i32);
2068 assert(imm.is_int8());
2069 if (Ty == IceType_i16)
2070 emitOperandSizeOverride();
2071 emitUint8(0x0F);
2072 emitUint8(0xAC);
2073 emitRegisterOperand(src, dst);
2074 emitUint8(imm.value() & 0xFF);
2075 }
2076
2077 void AssemblerX8632::shrd(Type Ty, const Address &dst, GPRRegister src) {
2078 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2079 assert(Ty == IceType_i16 || Ty == IceType_i32);
2080 if (Ty == IceType_i16)
2081 emitOperandSizeOverride();
2082 emitUint8(0x0F);
2083 emitUint8(0xAD);
2084 emitOperand(src, dst);
2085 }
2086
2087 void AssemblerX8632::neg(Type Ty, GPRRegister reg) {
2088 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2089 if (Ty == IceType_i16)
2090 emitOperandSizeOverride();
2091 if (isByteSizedArithType(Ty))
2092 emitUint8(0xF6);
2093 else
2094 emitUint8(0xF7);
2095 emitRegisterOperand(3, reg);
2096 }
2097
2098 void AssemblerX8632::neg(Type Ty, const Address &addr) {
2099 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2100 if (Ty == IceType_i16)
2101 emitOperandSizeOverride();
2102 if (isByteSizedArithType(Ty))
2103 emitUint8(0xF6);
2104 else
2105 emitUint8(0xF7);
2106 emitOperand(3, addr);
2107 }
2108
2109 void AssemblerX8632::notl(GPRRegister reg) {
2110 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2111 emitUint8(0xF7);
2112 emitUint8(0xD0 | reg);
2113 }
2114
2115 void AssemblerX8632::bswap(Type Ty, GPRRegister reg) {
2116 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2117 assert(Ty == IceType_i32);
2118 (void)Ty;
2119 emitUint8(0x0F);
2120 emitUint8(0xC8 | reg);
2121 }
2122
2123 void AssemblerX8632::bsf(Type Ty, GPRRegister dst, GPRRegister src) {
2124 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2125 assert(Ty == IceType_i16 || Ty == IceType_i32);
2126 if (Ty == IceType_i16)
2127 emitOperandSizeOverride();
2128 emitUint8(0x0F);
2129 emitUint8(0xBC);
2130 emitRegisterOperand(dst, src);
2131 }
2132
2133 void AssemblerX8632::bsf(Type Ty, GPRRegister dst, const Address &src) {
2134 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2135 assert(Ty == IceType_i16 || Ty == IceType_i32);
2136 if (Ty == IceType_i16)
2137 emitOperandSizeOverride();
2138 emitUint8(0x0F);
2139 emitUint8(0xBC);
2140 emitOperand(dst, src);
2141 }
2142
2143 void AssemblerX8632::bsr(Type Ty, GPRRegister dst, GPRRegister src) {
2144 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2145 assert(Ty == IceType_i16 || Ty == IceType_i32);
2146 if (Ty == IceType_i16)
2147 emitOperandSizeOverride();
2148 emitUint8(0x0F);
2149 emitUint8(0xBD);
2150 emitRegisterOperand(dst, src);
2151 }
2152
2153 void AssemblerX8632::bsr(Type Ty, GPRRegister dst, const Address &src) {
2154 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2155 assert(Ty == IceType_i16 || Ty == IceType_i32);
2156 if (Ty == IceType_i16)
2157 emitOperandSizeOverride();
2158 emitUint8(0x0F);
2159 emitUint8(0xBD);
2160 emitOperand(dst, src);
2161 }
2162
2163 void AssemblerX8632::bt(GPRRegister base, GPRRegister offset) {
2164 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2165 emitUint8(0x0F);
2166 emitUint8(0xA3);
2167 emitRegisterOperand(offset, base);
2168 }
2169
2170 void AssemblerX8632::ret() {
2171 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2172 emitUint8(0xC3);
2173 }
2174
2175 void AssemblerX8632::ret(const Immediate &imm) {
2176 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2177 emitUint8(0xC2);
2178 assert(imm.is_uint16());
2179 emitUint8(imm.value() & 0xFF);
2180 emitUint8((imm.value() >> 8) & 0xFF);
2181 }
2182
2183 void AssemblerX8632::nop(int size) {
2184 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2185 // There are nops up to size 15, but for now just provide up to size 8.
2186 assert(0 < size && size <= MAX_NOP_SIZE);
2187 switch (size) {
2188 case 1:
2189 emitUint8(0x90);
2190 break;
2191 case 2:
2192 emitUint8(0x66);
2193 emitUint8(0x90);
2194 break;
2195 case 3:
2196 emitUint8(0x0F);
2197 emitUint8(0x1F);
2198 emitUint8(0x00);
2199 break;
2200 case 4:
2201 emitUint8(0x0F);
2202 emitUint8(0x1F);
2203 emitUint8(0x40);
2204 emitUint8(0x00);
2205 break;
2206 case 5:
2207 emitUint8(0x0F);
2208 emitUint8(0x1F);
2209 emitUint8(0x44);
2210 emitUint8(0x00);
2211 emitUint8(0x00);
2212 break;
2213 case 6:
2214 emitUint8(0x66);
2215 emitUint8(0x0F);
2216 emitUint8(0x1F);
2217 emitUint8(0x44);
2218 emitUint8(0x00);
2219 emitUint8(0x00);
2220 break;
2221 case 7:
2222 emitUint8(0x0F);
2223 emitUint8(0x1F);
2224 emitUint8(0x80);
2225 emitUint8(0x00);
2226 emitUint8(0x00);
2227 emitUint8(0x00);
2228 emitUint8(0x00);
2229 break;
2230 case 8:
2231 emitUint8(0x0F);
2232 emitUint8(0x1F);
2233 emitUint8(0x84);
2234 emitUint8(0x00);
2235 emitUint8(0x00);
2236 emitUint8(0x00);
2237 emitUint8(0x00);
2238 emitUint8(0x00);
2239 break;
2240 default:
2241 llvm_unreachable("Unimplemented");
2242 }
2243 }
2244
2245 void AssemblerX8632::int3() {
2246 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2247 emitUint8(0xCC);
2248 }
2249
2250 void AssemblerX8632::hlt() {
2251 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2252 emitUint8(0xF4);
2253 }
2254
2255 void AssemblerX8632::ud2() {
2256 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2257 emitUint8(0x0F);
2258 emitUint8(0x0B);
2259 }
2260
2261 void AssemblerX8632::j(CondX86::BrCond condition, Label *label, bool near) {
2262 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2263 if (label->IsBound()) {
2264 static const int kShortSize = 2;
2265 static const int kLongSize = 6;
2266 intptr_t offset = label->Position() - Buffer.size();
2267 assert(offset <= 0);
2268 if (Utils::IsInt(8, offset - kShortSize)) {
2269 // TODO(stichnot): Here and in jmp(), we may need to be more
2270 // conservative about the backward branch distance if the branch
2271 // instruction is within a bundle_lock sequence, because the
2272 // distance may increase when padding is added. This isn't an
2273 // issue for branches outside a bundle_lock, because if padding
2274 // is added, the retry may change it to a long backward branch
2275 // without affecting any of the bookkeeping.
2276 emitUint8(0x70 + condition);
2277 emitUint8((offset - kShortSize) & 0xFF);
2278 } else {
2279 emitUint8(0x0F);
2280 emitUint8(0x80 + condition);
2281 emitInt32(offset - kLongSize);
2282 }
2283 } else if (near) {
2284 emitUint8(0x70 + condition);
2285 emitNearLabelLink(label);
2286 } else {
2287 emitUint8(0x0F);
2288 emitUint8(0x80 + condition);
2289 emitLabelLink(label);
2290 }
2291 }
2292
2293 void AssemblerX8632::j(CondX86::BrCond condition,
2294 const ConstantRelocatable *label) {
2295 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2296 emitUint8(0x0F);
2297 emitUint8(0x80 + condition);
2298 emitFixup(this->createFixup(llvm::ELF::R_386_PC32, label));
2299 emitInt32(-4);
2300 }
2301
2302 void AssemblerX8632::jmp(GPRRegister reg) {
2303 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2304 emitUint8(0xFF);
2305 emitRegisterOperand(4, reg);
2306 }
2307
2308 void AssemblerX8632::jmp(Label *label, bool near) {
2309 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2310 if (label->IsBound()) {
2311 static const int kShortSize = 2;
2312 static const int kLongSize = 5;
2313 intptr_t offset = label->Position() - Buffer.size();
2314 assert(offset <= 0);
2315 if (Utils::IsInt(8, offset - kShortSize)) {
2316 emitUint8(0xEB);
2317 emitUint8((offset - kShortSize) & 0xFF);
2318 } else {
2319 emitUint8(0xE9);
2320 emitInt32(offset - kLongSize);
2321 }
2322 } else if (near) {
2323 emitUint8(0xEB);
2324 emitNearLabelLink(label);
2325 } else {
2326 emitUint8(0xE9);
2327 emitLabelLink(label);
2328 }
2329 }
2330
2331 void AssemblerX8632::jmp(const ConstantRelocatable *label) {
2332 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2333 emitUint8(0xE9);
2334 emitFixup(this->createFixup(llvm::ELF::R_386_PC32, label));
2335 emitInt32(-4);
2336 }
2337
2338 void AssemblerX8632::mfence() {
2339 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2340 emitUint8(0x0F);
2341 emitUint8(0xAE);
2342 emitUint8(0xF0);
2343 }
2344
2345 void AssemblerX8632::lock() {
2346 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2347 emitUint8(0xF0);
2348 }
2349
2350 void AssemblerX8632::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
2351 bool Locked) {
2352 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2353 if (Ty == IceType_i16)
2354 emitOperandSizeOverride();
2355 if (Locked)
2356 emitUint8(0xF0);
2357 emitUint8(0x0F);
2358 if (isByteSizedArithType(Ty))
2359 emitUint8(0xB0);
2360 else
2361 emitUint8(0xB1);
2362 emitOperand(reg, address);
2363 }
2364
2365 void AssemblerX8632::cmpxchg8b(const Address &address, bool Locked) {
2366 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2367 if (Locked)
2368 emitUint8(0xF0);
2369 emitUint8(0x0F);
2370 emitUint8(0xC7);
2371 emitOperand(1, address);
2372 }
2373
2374 void AssemblerX8632::xadd(Type Ty, const Address &addr, GPRRegister reg,
2375 bool Locked) {
2376 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2377 if (Ty == IceType_i16)
2378 emitOperandSizeOverride();
2379 if (Locked)
2380 emitUint8(0xF0);
2381 emitUint8(0x0F);
2382 if (isByteSizedArithType(Ty))
2383 emitUint8(0xC0);
2384 else
2385 emitUint8(0xC1);
2386 emitOperand(reg, addr);
2387 }
2388
2389 void AssemblerX8632::xchg(Type Ty, const Address &addr, GPRRegister reg) {
2390 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2391 if (Ty == IceType_i16)
2392 emitOperandSizeOverride();
2393 if (isByteSizedArithType(Ty))
2394 emitUint8(0x86);
2395 else
2396 emitUint8(0x87);
2397 emitOperand(reg, addr);
2398 }
2399
2400 void AssemblerX8632::emitSegmentOverride(uint8_t prefix) {
2401 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2402 emitUint8(prefix);
2403 }
2404
2405 void AssemblerX8632::align(intptr_t alignment, intptr_t offset) {
2406 assert(llvm::isPowerOf2_32(alignment));
2407 intptr_t pos = offset + Buffer.getPosition();
2408 intptr_t mod = pos & (alignment - 1);
2409 if (mod == 0) {
2410 return;
2411 }
2412 intptr_t bytes_needed = alignment - mod;
2413 while (bytes_needed > MAX_NOP_SIZE) {
2414 nop(MAX_NOP_SIZE);
2415 bytes_needed -= MAX_NOP_SIZE;
2416 }
2417 if (bytes_needed) {
2418 nop(bytes_needed);
2419 }
2420 assert(((offset + Buffer.getPosition()) & (alignment - 1)) == 0);
2421 }
2422
2423 void AssemblerX8632::bind(Label *label) {
2424 intptr_t bound = Buffer.size();
2425 assert(!label->IsBound()); // Labels can only be bound once.
2426 while (label->IsLinked()) {
2427 intptr_t position = label->LinkPosition();
2428 intptr_t next = Buffer.load<int32_t>(position);
2429 Buffer.store<int32_t>(position, bound - (position + 4));
2430 label->position_ = next;
2431 }
2432 while (label->HasNear()) {
2433 intptr_t position = label->NearPosition();
2434 intptr_t offset = bound - (position + 1);
2435 assert(Utils::IsInt(8, offset));
2436 Buffer.store<int8_t>(position, offset);
2437 }
2438 label->BindTo(bound);
2439 }
2440
2441 void AssemblerX8632::emitOperand(int rm, const Operand &operand) {
2442 assert(rm >= 0 && rm < 8);
2443 const intptr_t length = operand.length_;
2444 assert(length > 0);
2445 // Emit the ModRM byte updated with the given RM value.
2446 assert((operand.encoding_[0] & 0x38) == 0);
2447 emitUint8(operand.encoding_[0] + (rm << 3));
2448 if (operand.fixup()) {
2449 emitFixup(operand.fixup());
2450 }
2451 // Emit the rest of the encoded operand.
2452 for (intptr_t i = 1; i < length; i++) {
2453 emitUint8(operand.encoding_[i]);
2454 }
2455 }
2456
2457 void AssemblerX8632::emitImmediate(Type Ty, const Immediate &imm) {
2458 if (Ty == IceType_i16) {
2459 assert(!imm.fixup());
2460 emitInt16(imm.value());
2461 } else {
2462 if (imm.fixup()) {
2463 emitFixup(imm.fixup());
2464 }
2465 emitInt32(imm.value());
2466 }
2467 }
2468
2469 void AssemblerX8632::emitComplexI8(int rm, const Operand &operand,
2470 const Immediate &immediate) {
2471 assert(rm >= 0 && rm < 8);
2472 assert(immediate.is_int8());
2473 if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
2474 // Use short form if the destination is al.
2475 emitUint8(0x04 + (rm << 3));
2476 emitUint8(immediate.value() & 0xFF);
2477 } else {
2478 // Use sign-extended 8-bit immediate.
2479 emitUint8(0x80);
2480 emitOperand(rm, operand);
2481 emitUint8(immediate.value() & 0xFF);
2482 }
2483 }
2484
2485 void AssemblerX8632::emitComplex(Type Ty, int rm, const Operand &operand,
2486 const Immediate &immediate) {
2487 assert(rm >= 0 && rm < 8);
2488 if (immediate.is_int8()) {
2489 // Use sign-extended 8-bit immediate.
2490 emitUint8(0x83);
2491 emitOperand(rm, operand);
2492 emitUint8(immediate.value() & 0xFF);
2493 } else if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
2494 // Use short form if the destination is eax.
2495 emitUint8(0x05 + (rm << 3));
2496 emitImmediate(Ty, immediate);
2497 } else {
2498 emitUint8(0x81);
2499 emitOperand(rm, operand);
2500 emitImmediate(Ty, immediate);
2501 }
2502 }
2503
2504 void AssemblerX8632::emitLabel(Label *label, intptr_t instruction_size) {
2505 if (label->IsBound()) {
2506 intptr_t offset = label->Position() - Buffer.size();
2507 assert(offset <= 0);
2508 emitInt32(offset - instruction_size);
2509 } else {
2510 emitLabelLink(label);
2511 }
2512 }
2513
2514 void AssemblerX8632::emitLabelLink(Label *Label) {
2515 assert(!Label->IsBound());
2516 intptr_t Position = Buffer.size();
2517 emitInt32(Label->position_);
2518 if (!getPreliminary())
2519 Label->LinkTo(Position);
2520 }
2521
2522 void AssemblerX8632::emitNearLabelLink(Label *label) {
2523 assert(!label->IsBound());
2524 intptr_t position = Buffer.size();
2525 emitUint8(0);
2526 if (!getPreliminary())
2527 label->NearLinkTo(position);
2528 }
2529
2530 void AssemblerX8632::emitGenericShift(int rm, Type Ty, GPRRegister reg,
2531 const Immediate &imm) {
2532 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2533 assert(imm.is_int8());
2534 if (Ty == IceType_i16)
2535 emitOperandSizeOverride();
2536 if (imm.value() == 1) {
2537 emitUint8(isByteSizedArithType(Ty) ? 0xD0 : 0xD1);
2538 emitOperand(rm, Operand(reg));
2539 } else {
2540 emitUint8(isByteSizedArithType(Ty) ? 0xC0 : 0xC1);
2541 emitOperand(rm, Operand(reg));
2542 emitUint8(imm.value() & 0xFF);
2543 }
2544 }
2545
2546 void AssemblerX8632::emitGenericShift(int rm, Type Ty, const Operand &operand,
2547 GPRRegister shifter) {
2548 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
2549 assert(shifter == RegX8632::Encoded_Reg_ecx);
2550 (void)shifter;
2551 if (Ty == IceType_i16)
2552 emitOperandSizeOverride();
2553 emitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
2554 emitOperand(rm, operand);
2555 }
2556
2557 } // end of namespace X8632
2558 } // end of namespace Ice
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