tests_lit/llvm2ice_tests/unreachable.ll - Issue 1214693004: ARM lowering integer divide and remainder, with div by 0 checks.

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Side by Side Diff: tests_lit/llvm2ice_tests/unreachable.ll

Issue 1214693004: ARM lowering integer divide and remainder, with div by 0 checks. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: review fixes Created 5 years, 5 months ago

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1 ; This tests the basic structure of the Unreachable instruction.	1 ; This tests the basic structure of the Unreachable instruction.

2	2

3 ; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 \| FileCheck %s	3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \

4 ; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 \| FileCheck %s	4 ; RUN: --target x8632 -i %s --args -O2 \

	5 ; RUN: \| %if --need=target_X8632 --command FileCheck %s

	6 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \

	7 ; RUN: --target x8632 -i %s --args -Om1 \

	8 ; RUN: \| %if --need=target_X8632 --command FileCheck %s

	9

	10 ; RUN: %if --need=target_ARM32 --need=allow_dump \

	11 ; RUN: --command %p2i --filetype=asm --assemble \

	12 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \

	13 ; RUN: \| %if --need=target_ARM32 --need=allow_dump \

	14 ; RUN: --command FileCheck --check-prefix ARM32 %s

5	15

6 define internal i32 @divide(i32 %num, i32 %den) {	16 define internal i32 @divide(i32 %num, i32 %den) {

7 entry:	17 entry:

8 %cmp = icmp ne i32 %den, 0	18 %cmp = icmp ne i32 %den, 0

9 br i1 %cmp, label %return, label %abort	19 br i1 %cmp, label %return, label %abort

10	20

11 abort: ; preds = %entry	21 abort: ; preds = %entry

12 unreachable	22 unreachable

13	23

14 return: ; preds = %entry	24 return: ; preds = %entry

15 %div = sdiv i32 %num, %den	25 %div = sdiv i32 %num, %den

16 ret i32 %div	26 ret i32 %div

17 }	27 }

18	28

19 ; CHECK-LABEL: divide	29 ; CHECK-LABEL: divide

20 ; CHECK: cmp	30 ; CHECK: cmp

21 ; CHECK: ud2	31 ; CHECK: ud2

22 ; CHECK: cdq	32 ; CHECK: cdq

23 ; CHECK: idiv	33 ; CHECK: idiv

24 ; CHECK: ret	34 ; CHECK: ret

	35

	36 ; ARM32-LABEL: divide

	37 ; ARM32: cmp

	38 ; ARM32: .word 0xe7fedef0

	39 ; ARM32: bl {{.*}} __divsi3

	40 ; ARM32: bx lr

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