tests_lit/llvm2ice_tests/switch-opt.ll - Issue 1214693004: ARM lowering integer divide and remainder, with div by 0 checks.

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Side by Side Diff: tests_lit/llvm2ice_tests/switch-opt.ll

Issue 1214693004: ARM lowering integer divide and remainder, with div by 0 checks. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: review fixes Created 5 years, 5 months ago

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1 ; This tests a switch statement, including multiple branches to the	1 ; This tests a switch statement, including multiple branches to the

2 ; same label which also results in phi instructions with multiple	2 ; same label which also results in phi instructions with multiple

3 ; entries for the same incoming edge.	3 ; entries for the same incoming edge.

4	4

5 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \| FileCheck %s	5 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \| FileCheck %s

6	6

7 ; TODO(jvoung): Update to -02 once the phi assignments is done for ARM	7 ; TODO(jvoung): Update to -02 once the phi assignments is done for ARM

8 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \	8 ; RUN: %if --need=target_ARM32 --need=allow_dump \

9 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \	9 ; RUN: --command %p2i --filetype=asm --assemble --disassemble \

10 ; RUN: \| %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s	10 ; RUN: --target arm32 -i %s --args -Om1 --skip-unimplemented \

	11 ; RUN: \| %if --need=target_ARM32 --need=allow_dump \

	12 ; RUN: --command FileCheck --check-prefix ARM32 %s

11	13

12 define i32 @testSwitch(i32 %a) {	14 define i32 @testSwitch(i32 %a) {

13 entry:	15 entry:

14 switch i32 %a, label %sw.default [	16 switch i32 %a, label %sw.default [

15 i32 1, label %sw.epilog	17 i32 1, label %sw.epilog

16 i32 2, label %sw.epilog	18 i32 2, label %sw.epilog

17 i32 3, label %sw.epilog	19 i32 3, label %sw.epilog

18 i32 7, label %sw.bb1	20 i32 7, label %sw.bb1

19 i32 8, label %sw.bb1	21 i32 8, label %sw.bb1

20 i32 15, label %sw.bb2	22 i32 15, label %sw.bb2

(...skipping 117 matching lines...) Expand 10 before \| Expand all \| Expand 10 after Loading...
138 ; CHECK-NEXT: jne	140 ; CHECK-NEXT: jne

139 ; CHECK-NEXT: cmp {{.*}},0x0	141 ; CHECK-NEXT: cmp {{.*}},0x0

140 ; CHECK-NEXT: je	142 ; CHECK-NEXT: je

141	143

142 ; ARM32-LABEL: testSwitchImm64	144 ; ARM32-LABEL: testSwitchImm64

143 ; ARM32: cmp {{r[0-9]+}}, #1	145 ; ARM32: cmp {{r[0-9]+}}, #1

144 ; ARM32-NEXT: cmpeq {{r[0-9]+}}, #0	146 ; ARM32-NEXT: cmpeq {{r[0-9]+}}, #0

145 ; ARM32-NEXT: beq [[ADDR:[0-9a-f]+]]	147 ; ARM32-NEXT: beq [[ADDR:[0-9a-f]+]]

146 ; ARM32-NEXT: b [[ADDR]]	148 ; ARM32-NEXT: b [[ADDR]]

147	149

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