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Issue 121303005: Use std:: on symbols declared in C++-style C headers. (Closed) Base URL: git://github.com/v8/v8.git@master
Patch Set: Same as the previous CL, but with an addition to cctest/test-log.cc Created 6 years, 11 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
11 // with the distribution. 11 // with the distribution.
12 // * Neither the name of Google Inc. nor the names of its 12 // * Neither the name of Google Inc. nor the names of its
13 // contributors may be used to endorse or promote products derived 13 // contributors may be used to endorse or promote products derived
14 // from this software without specific prior written permission. 14 // from this software without specific prior written permission.
15 // 15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 27
28 #include <limits.h>
29 #include <stdarg.h>
28 #include <stdlib.h> 30 #include <stdlib.h>
29 #include <limits.h>
30 #include <cmath> 31 #include <cmath>
31 #include <cstdarg> 32
32 #include "v8.h" 33 #include "v8.h"
33 34
34 #if V8_TARGET_ARCH_MIPS 35 #if V8_TARGET_ARCH_MIPS
35 36
36 #include "cpu.h" 37 #include "cpu.h"
37 #include "disasm.h" 38 #include "disasm.h"
38 #include "assembler.h" 39 #include "assembler.h"
39 #include "globals.h" // Need the BitCast. 40 #include "globals.h" // Need the BitCast.
40 #include "mips/constants-mips.h" 41 #include "mips/constants-mips.h"
41 #include "mips/simulator-mips.h" 42 #include "mips/simulator-mips.h"
(...skipping 2066 matching lines...) Expand 10 before | Expand all | Expand 10 after
2108 case C_ULE_D: 2109 case C_ULE_D:
2109 set_fcsr_bit(fcsr_cc, 2110 set_fcsr_bit(fcsr_cc,
2110 (fs <= ft) || (std::isnan(fs) || std::isnan(ft))); 2111 (fs <= ft) || (std::isnan(fs) || std::isnan(ft)));
2111 break; 2112 break;
2112 case CVT_W_D: // Convert double to word. 2113 case CVT_W_D: // Convert double to word.
2113 // Rounding modes are not yet supported. 2114 // Rounding modes are not yet supported.
2114 ASSERT((FCSR_ & 3) == 0); 2115 ASSERT((FCSR_ & 3) == 0);
2115 // In rounding mode 0 it should behave like ROUND. 2116 // In rounding mode 0 it should behave like ROUND.
2116 case ROUND_W_D: // Round double to word (round half to even). 2117 case ROUND_W_D: // Round double to word (round half to even).
2117 { 2118 {
2118 double rounded = floor(fs + 0.5); 2119 double rounded = std::floor(fs + 0.5);
2119 int32_t result = static_cast<int32_t>(rounded); 2120 int32_t result = static_cast<int32_t>(rounded);
2120 if ((result & 1) != 0 && result - fs == 0.5) { 2121 if ((result & 1) != 0 && result - fs == 0.5) {
2121 // If the number is halfway between two integers, 2122 // If the number is halfway between two integers,
2122 // round to the even one. 2123 // round to the even one.
2123 result--; 2124 result--;
2124 } 2125 }
2125 set_fpu_register(fd_reg, result); 2126 set_fpu_register(fd_reg, result);
2126 if (set_fcsr_round_error(fs, rounded)) { 2127 if (set_fcsr_round_error(fs, rounded)) {
2127 set_fpu_register(fd_reg, kFPUInvalidResult); 2128 set_fpu_register(fd_reg, kFPUInvalidResult);
2128 } 2129 }
2129 } 2130 }
2130 break; 2131 break;
2131 case TRUNC_W_D: // Truncate double to word (round towards 0). 2132 case TRUNC_W_D: // Truncate double to word (round towards 0).
2132 { 2133 {
2133 double rounded = trunc(fs); 2134 double rounded = trunc(fs);
2134 int32_t result = static_cast<int32_t>(rounded); 2135 int32_t result = static_cast<int32_t>(rounded);
2135 set_fpu_register(fd_reg, result); 2136 set_fpu_register(fd_reg, result);
2136 if (set_fcsr_round_error(fs, rounded)) { 2137 if (set_fcsr_round_error(fs, rounded)) {
2137 set_fpu_register(fd_reg, kFPUInvalidResult); 2138 set_fpu_register(fd_reg, kFPUInvalidResult);
2138 } 2139 }
2139 } 2140 }
2140 break; 2141 break;
2141 case FLOOR_W_D: // Round double to word towards negative infinity. 2142 case FLOOR_W_D: // Round double to word towards negative infinity.
2142 { 2143 {
2143 double rounded = floor(fs); 2144 double rounded = std::floor(fs);
2144 int32_t result = static_cast<int32_t>(rounded); 2145 int32_t result = static_cast<int32_t>(rounded);
2145 set_fpu_register(fd_reg, result); 2146 set_fpu_register(fd_reg, result);
2146 if (set_fcsr_round_error(fs, rounded)) { 2147 if (set_fcsr_round_error(fs, rounded)) {
2147 set_fpu_register(fd_reg, kFPUInvalidResult); 2148 set_fpu_register(fd_reg, kFPUInvalidResult);
2148 } 2149 }
2149 } 2150 }
2150 break; 2151 break;
2151 case CEIL_W_D: // Round double to word towards positive infinity. 2152 case CEIL_W_D: // Round double to word towards positive infinity.
2152 { 2153 {
2153 double rounded = ceil(fs); 2154 double rounded = std::ceil(fs);
2154 int32_t result = static_cast<int32_t>(rounded); 2155 int32_t result = static_cast<int32_t>(rounded);
2155 set_fpu_register(fd_reg, result); 2156 set_fpu_register(fd_reg, result);
2156 if (set_fcsr_round_error(fs, rounded)) { 2157 if (set_fcsr_round_error(fs, rounded)) {
2157 set_fpu_register(fd_reg, kFPUInvalidResult); 2158 set_fpu_register(fd_reg, kFPUInvalidResult);
2158 } 2159 }
2159 } 2160 }
2160 break; 2161 break;
2161 case CVT_S_D: // Convert double to float (single). 2162 case CVT_S_D: // Convert double to float (single).
2162 set_fpu_register_float(fd_reg, static_cast<float>(fs)); 2163 set_fpu_register_float(fd_reg, static_cast<float>(fs));
2163 break; 2164 break;
2164 case CVT_L_D: { // Mips32r2: Truncate double to 64-bit long-word. 2165 case CVT_L_D: { // Mips32r2: Truncate double to 64-bit long-word.
2165 double rounded = trunc(fs); 2166 double rounded = trunc(fs);
2166 i64 = static_cast<int64_t>(rounded); 2167 i64 = static_cast<int64_t>(rounded);
2167 set_fpu_register(fd_reg, i64 & 0xffffffff); 2168 set_fpu_register(fd_reg, i64 & 0xffffffff);
2168 set_fpu_register(fd_reg + 1, i64 >> 32); 2169 set_fpu_register(fd_reg + 1, i64 >> 32);
2169 break; 2170 break;
2170 } 2171 }
2171 case TRUNC_L_D: { // Mips32r2 instruction. 2172 case TRUNC_L_D: { // Mips32r2 instruction.
2172 double rounded = trunc(fs); 2173 double rounded = trunc(fs);
2173 i64 = static_cast<int64_t>(rounded); 2174 i64 = static_cast<int64_t>(rounded);
2174 set_fpu_register(fd_reg, i64 & 0xffffffff); 2175 set_fpu_register(fd_reg, i64 & 0xffffffff);
2175 set_fpu_register(fd_reg + 1, i64 >> 32); 2176 set_fpu_register(fd_reg + 1, i64 >> 32);
2176 break; 2177 break;
2177 } 2178 }
2178 case ROUND_L_D: { // Mips32r2 instruction. 2179 case ROUND_L_D: { // Mips32r2 instruction.
2179 double rounded = fs > 0 ? floor(fs + 0.5) : ceil(fs - 0.5); 2180 double rounded =
2181 fs > 0 ? std::floor(fs + 0.5) : std::ceil(fs - 0.5);
2180 i64 = static_cast<int64_t>(rounded); 2182 i64 = static_cast<int64_t>(rounded);
2181 set_fpu_register(fd_reg, i64 & 0xffffffff); 2183 set_fpu_register(fd_reg, i64 & 0xffffffff);
2182 set_fpu_register(fd_reg + 1, i64 >> 32); 2184 set_fpu_register(fd_reg + 1, i64 >> 32);
2183 break; 2185 break;
2184 } 2186 }
2185 case FLOOR_L_D: // Mips32r2 instruction. 2187 case FLOOR_L_D: // Mips32r2 instruction.
2186 i64 = static_cast<int64_t>(floor(fs)); 2188 i64 = static_cast<int64_t>(std::floor(fs));
2187 set_fpu_register(fd_reg, i64 & 0xffffffff); 2189 set_fpu_register(fd_reg, i64 & 0xffffffff);
2188 set_fpu_register(fd_reg + 1, i64 >> 32); 2190 set_fpu_register(fd_reg + 1, i64 >> 32);
2189 break; 2191 break;
2190 case CEIL_L_D: // Mips32r2 instruction. 2192 case CEIL_L_D: // Mips32r2 instruction.
2191 i64 = static_cast<int64_t>(ceil(fs)); 2193 i64 = static_cast<int64_t>(std::ceil(fs));
2192 set_fpu_register(fd_reg, i64 & 0xffffffff); 2194 set_fpu_register(fd_reg, i64 & 0xffffffff);
2193 set_fpu_register(fd_reg + 1, i64 >> 32); 2195 set_fpu_register(fd_reg + 1, i64 >> 32);
2194 break; 2196 break;
2195 case C_F_D: 2197 case C_F_D:
2196 UNIMPLEMENTED_MIPS(); 2198 UNIMPLEMENTED_MIPS();
2197 break; 2199 break;
2198 default: 2200 default:
2199 UNREACHABLE(); 2201 UNREACHABLE();
2200 } 2202 }
2201 break; 2203 break;
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2926 } 2928 }
2927 2929
2928 2930
2929 #undef UNSUPPORTED 2931 #undef UNSUPPORTED
2930 2932
2931 } } // namespace v8::internal 2933 } } // namespace v8::internal
2932 2934
2933 #endif // USE_SIMULATOR 2935 #endif // USE_SIMULATOR
2934 2936
2935 #endif // V8_TARGET_ARCH_MIPS 2937 #endif // V8_TARGET_ARCH_MIPS
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