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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
11 // with the distribution. | 11 // with the distribution. |
12 // * Neither the name of Google Inc. nor the names of its | 12 // * Neither the name of Google Inc. nor the names of its |
13 // contributors may be used to endorse or promote products derived | 13 // contributors may be used to endorse or promote products derived |
14 // from this software without specific prior written permission. | 14 // from this software without specific prior written permission. |
15 // | 15 // |
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | 17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | 18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | 19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | 20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | 21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | 22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | 23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | 25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | 27 |
| 28 #include <stdarg.h> |
28 #include <stdlib.h> | 29 #include <stdlib.h> |
29 #include <cmath> | 30 #include <cmath> |
30 #include <cstdarg> | 31 |
31 #include "v8.h" | 32 #include "v8.h" |
32 | 33 |
33 #if V8_TARGET_ARCH_ARM | 34 #if V8_TARGET_ARCH_ARM |
34 | 35 |
35 #include "disasm.h" | 36 #include "disasm.h" |
36 #include "assembler.h" | 37 #include "assembler.h" |
37 #include "codegen.h" | 38 #include "codegen.h" |
38 #include "arm/constants-arm.h" | 39 #include "arm/constants-arm.h" |
39 #include "arm/simulator-arm.h" | 40 #include "arm/simulator-arm.h" |
40 | 41 |
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2902 int d = instr->VFPDRegValue(kDoublePrecision); | 2903 int d = instr->VFPDRegValue(kDoublePrecision); |
2903 set_d_register_from_double(d, get_double_from_d_register(m)); | 2904 set_d_register_from_double(d, get_double_from_d_register(m)); |
2904 } else { | 2905 } else { |
2905 int m = instr->VFPMRegValue(kSinglePrecision); | 2906 int m = instr->VFPMRegValue(kSinglePrecision); |
2906 int d = instr->VFPDRegValue(kSinglePrecision); | 2907 int d = instr->VFPDRegValue(kSinglePrecision); |
2907 set_s_register_from_float(d, get_float_from_s_register(m)); | 2908 set_s_register_from_float(d, get_float_from_s_register(m)); |
2908 } | 2909 } |
2909 } else if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x3)) { | 2910 } else if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x3)) { |
2910 // vabs | 2911 // vabs |
2911 double dm_value = get_double_from_d_register(vm); | 2912 double dm_value = get_double_from_d_register(vm); |
2912 double dd_value = fabs(dm_value); | 2913 double dd_value = std::fabs(dm_value); |
2913 dd_value = canonicalizeNaN(dd_value); | 2914 dd_value = canonicalizeNaN(dd_value); |
2914 set_d_register_from_double(vd, dd_value); | 2915 set_d_register_from_double(vd, dd_value); |
2915 } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) { | 2916 } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) { |
2916 // vneg | 2917 // vneg |
2917 double dm_value = get_double_from_d_register(vm); | 2918 double dm_value = get_double_from_d_register(vm); |
2918 double dd_value = -dm_value; | 2919 double dd_value = -dm_value; |
2919 dd_value = canonicalizeNaN(dd_value); | 2920 dd_value = canonicalizeNaN(dd_value); |
2920 set_d_register_from_double(vd, dd_value); | 2921 set_d_register_from_double(vd, dd_value); |
2921 } else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) { | 2922 } else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) { |
2922 DecodeVCVTBetweenDoubleAndSingle(instr); | 2923 DecodeVCVTBetweenDoubleAndSingle(instr); |
2923 } else if ((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) { | 2924 } else if ((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) { |
2924 DecodeVCVTBetweenFloatingPointAndInteger(instr); | 2925 DecodeVCVTBetweenFloatingPointAndInteger(instr); |
2925 } else if ((instr->Opc2Value() == 0xA) && (instr->Opc3Value() == 0x3) && | 2926 } else if ((instr->Opc2Value() == 0xA) && (instr->Opc3Value() == 0x3) && |
2926 (instr->Bit(8) == 1)) { | 2927 (instr->Bit(8) == 1)) { |
2927 // vcvt.f64.s32 Dd, Dd, #<fbits> | 2928 // vcvt.f64.s32 Dd, Dd, #<fbits> |
2928 int fraction_bits = 32 - ((instr->Bit(5) << 4) | instr->Bits(3, 0)); | 2929 int fraction_bits = 32 - ((instr->Bit(5) << 4) | instr->Bits(3, 0)); |
2929 int fixed_value = get_sinteger_from_s_register(vd * 2); | 2930 int fixed_value = get_sinteger_from_s_register(vd * 2); |
2930 double divide = 1 << fraction_bits; | 2931 double divide = 1 << fraction_bits; |
2931 set_d_register_from_double(vd, fixed_value / divide); | 2932 set_d_register_from_double(vd, fixed_value / divide); |
2932 } else if (((instr->Opc2Value() >> 1) == 0x6) && | 2933 } else if (((instr->Opc2Value() >> 1) == 0x6) && |
2933 (instr->Opc3Value() & 0x1)) { | 2934 (instr->Opc3Value() & 0x1)) { |
2934 DecodeVCVTBetweenFloatingPointAndInteger(instr); | 2935 DecodeVCVTBetweenFloatingPointAndInteger(instr); |
2935 } else if (((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) && | 2936 } else if (((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) && |
2936 (instr->Opc3Value() & 0x1)) { | 2937 (instr->Opc3Value() & 0x1)) { |
2937 DecodeVCMP(instr); | 2938 DecodeVCMP(instr); |
2938 } else if (((instr->Opc2Value() == 0x1)) && (instr->Opc3Value() == 0x3)) { | 2939 } else if (((instr->Opc2Value() == 0x1)) && (instr->Opc3Value() == 0x3)) { |
2939 // vsqrt | 2940 // vsqrt |
2940 double dm_value = get_double_from_d_register(vm); | 2941 double dm_value = get_double_from_d_register(vm); |
2941 double dd_value = sqrt(dm_value); | 2942 double dd_value = std::sqrt(dm_value); |
2942 dd_value = canonicalizeNaN(dd_value); | 2943 dd_value = canonicalizeNaN(dd_value); |
2943 set_d_register_from_double(vd, dd_value); | 2944 set_d_register_from_double(vd, dd_value); |
2944 } else if (instr->Opc3Value() == 0x0) { | 2945 } else if (instr->Opc3Value() == 0x0) { |
2945 // vmov immediate. | 2946 // vmov immediate. |
2946 if (instr->SzValue() == 0x1) { | 2947 if (instr->SzValue() == 0x1) { |
2947 set_d_register_from_double(vd, instr->DoubleImmedVmov()); | 2948 set_d_register_from_double(vd, instr->DoubleImmedVmov()); |
2948 } else { | 2949 } else { |
2949 UNREACHABLE(); // Not used by v8. | 2950 UNREACHABLE(); // Not used by v8. |
2950 } | 2951 } |
2951 } else { | 2952 } else { |
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3267 | 3268 |
3268 double val = double_precision ? get_double_from_d_register(src) | 3269 double val = double_precision ? get_double_from_d_register(src) |
3269 : get_float_from_s_register(src); | 3270 : get_float_from_s_register(src); |
3270 | 3271 |
3271 int temp = unsigned_integer ? static_cast<uint32_t>(val) | 3272 int temp = unsigned_integer ? static_cast<uint32_t>(val) |
3272 : static_cast<int32_t>(val); | 3273 : static_cast<int32_t>(val); |
3273 | 3274 |
3274 inv_op_vfp_flag_ = get_inv_op_vfp_flag(mode, val, unsigned_integer); | 3275 inv_op_vfp_flag_ = get_inv_op_vfp_flag(mode, val, unsigned_integer); |
3275 | 3276 |
3276 double abs_diff = | 3277 double abs_diff = |
3277 unsigned_integer ? fabs(val - static_cast<uint32_t>(temp)) | 3278 unsigned_integer ? std::fabs(val - static_cast<uint32_t>(temp)) |
3278 : fabs(val - temp); | 3279 : std::fabs(val - temp); |
3279 | 3280 |
3280 inexact_vfp_flag_ = (abs_diff != 0); | 3281 inexact_vfp_flag_ = (abs_diff != 0); |
3281 | 3282 |
3282 if (inv_op_vfp_flag_) { | 3283 if (inv_op_vfp_flag_) { |
3283 temp = VFPConversionSaturate(val, unsigned_integer); | 3284 temp = VFPConversionSaturate(val, unsigned_integer); |
3284 } else { | 3285 } else { |
3285 switch (mode) { | 3286 switch (mode) { |
3286 case RN: { | 3287 case RN: { |
3287 int val_sign = (val > 0) ? 1 : -1; | 3288 int val_sign = (val > 0) ? 1 : -1; |
3288 if (abs_diff > 0.5) { | 3289 if (abs_diff > 0.5) { |
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3839 uintptr_t address = *stack_slot; | 3840 uintptr_t address = *stack_slot; |
3840 set_register(sp, current_sp + sizeof(uintptr_t)); | 3841 set_register(sp, current_sp + sizeof(uintptr_t)); |
3841 return address; | 3842 return address; |
3842 } | 3843 } |
3843 | 3844 |
3844 } } // namespace v8::internal | 3845 } } // namespace v8::internal |
3845 | 3846 |
3846 #endif // USE_SIMULATOR | 3847 #endif // USE_SIMULATOR |
3847 | 3848 |
3848 #endif // V8_TARGET_ARCH_ARM | 3849 #endif // V8_TARGET_ARCH_ARM |
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